1/*
2 * Copyright (c) 2024-2025 Henrik Brix Andersen <henrik@brixandersen.dk>
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/dts-v1/;
7
8#include <freq.h>
9#include <mem.h>
10#include <atmel/same70x20b.dtsi>
11#include <zephyr/dt-bindings/gpio/gpio.h>
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13
14#include "canbardo-pinctrl.dtsi"
15
16/ {
17	model = "CANbardo board";
18	compatible = "canbardo", "atmel,same70n20b", "atmel,same70b";
19
20	chosen {
21		zephyr,console = &uart1;
22		zephyr,shell-uart = &uart1;
23		zephyr,sram = &sram0;
24		zephyr,flash = &flash0;
25		zephyr,code-partition = &slot0_partition;
26		zephyr,canbus = &can0;
27	};
28
29	aliases {
30		led0 = &dfu_led;
31		sw0 = &sw;
32		mcuboot-led0 = &dfu_led;
33		mcuboot-button0 = &sw;
34	};
35
36	leds {
37		compatible = "gpio-leds";
38
39		dfu_led: dfu_led {
40			gpios = <&piod 9 GPIO_ACTIVE_LOW>;
41			label = "DFU LED";
42		};
43
44		can_0_ledr: can_0_ledr {
45			gpios = <&piod 25 GPIO_ACTIVE_LOW>;
46			label = "CAN0 LED ERR";
47		};
48
49		can_0_ledg: can_0_ledg {
50			gpios = <&piod 22 GPIO_ACTIVE_LOW>;
51			label = "CAN0 LED RDY";
52		};
53
54		can_0_ledy: can_0_ledy {
55			gpios = <&piod 24 GPIO_ACTIVE_LOW>;
56			label = "CAN0 LED ACT";
57		};
58
59		can_1_ledr: can_1_ledr {
60			gpios = <&piod 19 GPIO_ACTIVE_LOW>;
61			label = "CAN1 LED ERR";
62		};
63
64		can_1_ledg: can_1_ledg {
65			gpios = <&piod 17 GPIO_ACTIVE_LOW>;
66			label = "CAN1 LED RDY";
67		};
68
69		can_1_ledy: can_1_ledy {
70			gpios = <&piod 18 GPIO_ACTIVE_LOW>;
71			label = "CAN1 LED ACT";
72		};
73	};
74
75	gpio_keys {
76		compatible = "gpio-keys";
77
78		sw: sw {
79			label = "SW";
80			gpios = <&piod 15 GPIO_ACTIVE_LOW>;
81			zephyr,code = <INPUT_KEY_0>;
82		};
83	};
84
85	transceiver0: can-phy0 {
86		compatible = "microchip,mcp2558fd", "can-transceiver-gpio";
87		enable-gpios = <&piod 26 GPIO_ACTIVE_LOW>;
88		max-bitrate = <8000000>;
89		#phy-cells = <0>;
90	};
91
92	transceiver1: can-phy1 {
93		compatible = "microchip,mcp2558fd", "can-transceiver-gpio";
94		enable-gpios = <&piod 20 GPIO_ACTIVE_LOW>;
95		max-bitrate = <8000000>;
96		#phy-cells = <0>;
97	};
98};
99
100&cpu0 {
101	clock-frequency = <DT_FREQ_M(300)>;
102};
103
104&uart1 {
105	status = "okay";
106	current-speed = <115200>;
107	pinctrl-0 = <&uart1_default>;
108	pinctrl-names = "default";
109};
110
111zephyr_udc0: &usbhs {
112	status = "okay";
113};
114
115&can0 {
116	status = "okay";
117	pinctrl-0 = <&can0_default>;
118	pinctrl-names = "default";
119	phys = <&transceiver0>;
120};
121
122&can1 {
123	status = "okay";
124	pinctrl-0 = <&can1_default>;
125	pinctrl-names = "default";
126	phys = <&transceiver1>;
127};
128
129&wdt {
130	status = "okay";
131};
132
133&flash0 {
134	partitions {
135		compatible = "fixed-partitions";
136		#address-cells = <1>;
137		#size-cells = <1>;
138
139		/* First half of sector 0 */
140		boot_partition: partition@0 {
141			label = "mcuboot";
142			reg = <0x0 DT_SIZE_K(64)>;
143			read-only;
144		};
145
146		/* From sector 1 to sector 3 (included) */
147		slot0_partition: partition@20000 {
148			label = "image-0";
149			reg = <0x00020000 DT_SIZE_K(384)>;
150		};
151
152		/* From sector 4 to sector 6 (included) */
153		slot1_partition: partition@80000 {
154			label = "image-1";
155			reg = <0x00080000 DT_SIZE_K(384)>;
156		};
157
158		/* Sector 7 */
159		storage_partition: partition@e0000 {
160			label = "storage";
161			reg = <0x000e0000 DT_SIZE_K(128)>;
162		};
163	};
164};
165