1/* 2 * Copyright (c) 2025 Renesas Electronics Corporation 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6&pinctrl { 7 sci0_default: sci0_default { 8 group1 { 9 /* tx rx */ 10 psels = <RA_PSEL(RA_PSEL_SCI_0, 1, 1)>, 11 <RA_PSEL(RA_PSEL_SCI_0, 1, 0)>; 12 }; 13 }; 14 15 iic0_default: iic0_default { 16 group1 { 17 /* SCL0 SDA0 */ 18 psels = <RA_PSEL(RA_PSEL_I2C, 4, 0)>, 19 <RA_PSEL(RA_PSEL_I2C, 4, 1)>; 20 drive-strength = "medium"; 21 }; 22 }; 23 24 spi0_default: spi0_default { 25 group1 { 26 /* MISO MOSI RSPCK SSL */ 27 psels = <RA_PSEL(RA_PSEL_SPI, 1, 10)>, 28 <RA_PSEL(RA_PSEL_SPI, 1, 9)>, 29 <RA_PSEL(RA_PSEL_SPI, 1, 11)>, 30 <RA_PSEL(RA_PSEL_SPI, 3, 1)>; 31 }; 32 }; 33 34 adc0_default: adc0_default { 35 group1 { 36 /* input */ 37 psels = <RA_PSEL(RA_PSEL_ADC, 0, 0)>; 38 renesas,analog-enable; 39 }; 40 }; 41 42 dac0_default: dac0_default { 43 group1 { 44 /* output */ 45 psels = <RA_PSEL(RA_PSEL_DAC, 0, 14)>; 46 renesas,analog-enable; 47 }; 48 }; 49 50 pwm1_default: pwm1_default { 51 group1 { 52 /* GTIOC1A GTIOC1B */ 53 psels = <RA_PSEL(RA_PSEL_GPT1, 1, 5)>, 54 <RA_PSEL(RA_PSEL_GPT1, 1, 4)>; 55 }; 56 }; 57}; 58