1/*
2 * Copyright (c) 2025 Renesas Electronics Corporation
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/dts-v1/;
7
8#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
9#include <zephyr/dt-bindings/input/input-event-codes.h>
10#include <zephyr/dt-bindings/gpio/renesas-rz-gpio.h>
11#include <freq.h>
12#include <arm64/renesas/rz/rza/r9a07g063.dtsi>
13#include "rza3ul_smarc-pinctrl.dtsi"
14
15/ {
16	model = "Renesas RZ/A3UL SMARC";
17	compatible = "renesas,rza3ul-smarc";
18
19	chosen {
20		zephyr,sram = &ddr;
21		zephyr,flash = &spi_flash;
22		zephyr,console = &scif0;
23		zephyr,shell-uart = &scif0;
24		zephyr,code-partition= &slot0_partition;
25	};
26
27	ddr: memory@40200000 {
28		compatible ="zephyr,memory-region", "mmio-sram";
29		reg = <0x40200000 (DT_SIZE_M(1024) - 0x200000)>;
30		zephyr,memory-region = "DDR";
31	};
32
33	sram: memory@1e000 {
34		compatible ="zephyr,memory-region", "mmio-sram";
35		reg = <0x1e000 DT_SIZE_K(72)>;
36		zephyr,memory-region = "SRAM";
37	};
38
39	spi_flash: memory@20020000 {
40		compatible = "mmio-sram";
41		reg = <0x20020000 (DT_SIZE_M(16) - 0x20000)>;
42
43		partitions {
44			compatible = "fixed-partitions";
45			#address-cells = <1>;
46			#size-cells = <1>;
47
48			header: partition@0 {
49				label = "header";
50				reg = <0x00000000 0x200>;
51				read-only;
52			};
53
54			slot0_partition: partition@200 {
55				label = "image-0";
56				reg = <0x00000200 (DT_SIZE_M(16)- 0x20200)>;
57				read-only;
58			};
59		};
60	};
61
62};
63
64&scif0 {
65	current-speed = <115200>;
66	pinctrl-0 = <&scif0_pins>;
67	pinctrl-names = "default";
68	status = "okay";
69};
70
71&adc {
72	status = "okay";
73};
74