1/*
2 * Copyright (c) 2017 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/f4/stm32f429Xi.dtsi>
9#include <st/f4/stm32f429zitx-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "STMicroelectronics STM32F429ZI-NUCLEO board";
15	compatible = "st,stm32f429zi-nucleo";
16
17	chosen {
18		zephyr,console = &usart3;
19		zephyr,shell-uart = &usart3;
20		zephyr,sram = &sram0;
21		zephyr,flash = &flash0;
22		zephyr,ccm = &ccm0;
23		zephyr,code-partition = &slot0_partition;
24	};
25
26	leds: leds {
27		compatible = "gpio-leds";
28
29		green_led_1: led_1 {
30			gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
31			label = "User LD1";
32		};
33
34		blue_led_1: led_2 {
35			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
36			label = "User LD2";
37		};
38
39		red_led_1: led_3 {
40			gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
41			label = "User LD3";
42		};
43	};
44
45	gpio_keys {
46		compatible = "gpio-keys";
47
48		user_button: button {
49			label = "User";
50			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
51			zephyr,code = <INPUT_KEY_0>;
52		};
53	};
54
55	aliases {
56		led0 = &green_led_1;
57		led1 = &blue_led_1;
58		led2 = &red_led_1;
59		sw0 = &user_button;
60		watchdog0 = &iwdg;
61		die-temp0 = &die_temp;
62		volt-sensor0 = &vref;
63		volt-sensor1 = &vbat;
64	};
65};
66
67&clk_lsi {
68	status = "okay";
69};
70
71&clk_hse {
72	hse-bypass;
73	clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
74	status = "okay";
75};
76
77&pll {
78	div-m = <8>;
79	mul-n = <336>;
80	div-p = <2>;
81	div-q = <7>;
82	clocks = <&clk_hse>;
83	status = "okay";
84};
85
86&rcc {
87	clocks = <&pll>;
88	clock-frequency = <DT_FREQ_M(168)>; /* highest value to get a precise USB clock */
89	ahb-prescaler = <1>;
90	apb1-prescaler = <4>;
91	apb2-prescaler = <2>;
92};
93
94&adc1 {
95	pinctrl-0 = <&adc1_in0_pa0>;
96	pinctrl-names = "default";
97	st,adc-clock-source = "SYNC";
98	st,adc-prescaler = <2>;
99	status = "okay";
100};
101
102&die_temp {
103	status = "okay";
104};
105
106&dac1 {
107	status = "okay";
108	pinctrl-0 = <&dac_out1_pa4>;
109	pinctrl-names = "default";
110};
111
112&i2c1 {
113	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
114	pinctrl-names = "default";
115	status = "okay";
116	clock-frequency = <I2C_BITRATE_FAST>;
117};
118
119&i2c2 {
120	pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
121	pinctrl-names = "default";
122	status = "okay";
123	clock-frequency = <I2C_BITRATE_FAST>;
124};
125
126&spi1 {
127	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
128	pinctrl-names = "default";
129	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
130	status = "okay";
131};
132
133&usart3 {
134	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
135	pinctrl-names = "default";
136	current-speed = <115200>;
137	status = "okay";
138};
139&usart6 {
140	pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
141	pinctrl-names = "default";
142	current-speed = <115200>;
143	status = "okay";
144};
145
146zephyr_udc0: &usbotg_fs {
147	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
148	pinctrl-names = "default";
149	status = "okay";
150};
151
152&timers1 {
153	st,prescaler = <10000>;
154	status = "okay";
155
156	pwm1: pwm {
157		status = "okay";
158		pinctrl-0 = <&tim1_ch3_pe13>;
159		pinctrl-names = "default";
160	};
161};
162
163&rtc {
164	clocks = <&rcc STM32_CLOCK(APB1, 28)>,
165		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
166	status = "okay";
167};
168
169&iwdg {
170	status = "okay";
171};
172
173&rng {
174	status = "okay";
175};
176
177&dma2 {
178	status = "okay";
179};
180
181&mac {
182	status = "okay";
183	pinctrl-0 = <&eth_rxd0_pc4
184		     &eth_rxd1_pc5
185		     &eth_ref_clk_pa1
186		     &eth_crs_dv_pa7
187		     &eth_tx_en_pg11
188		     &eth_txd0_pg13
189		     &eth_txd1_pb13>;
190	pinctrl-names = "default";
191	phy-connection-type = "rmii";
192	phy-handle = <&eth_phy>;
193};
194
195&mdio {
196	status = "okay";
197	pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
198	pinctrl-names = "default";
199
200	eth_phy: ethernet-phy@0 {
201		compatible = "ethernet-phy";
202		reg = <0x00>;
203	};
204};
205
206&flash0 {
207	partitions {
208		compatible = "fixed-partitions";
209		#address-cells = <1>;
210		#size-cells = <1>;
211
212		/* 32KB for bootloader */
213		boot_partition: partition@0 {
214			label = "mcuboot";
215			reg = <0x00000000 DT_SIZE_K(32)>;
216			read-only;
217		};
218
219		/*
220		 * nvs subsystem requires 2 sectors with a max total of 32K
221		 * On F4 series, the only option is to use the following
222		 * partition, which is compatible with mcuboot usage.
223		 * Keep it commented in order it is not used by CI.
224		 *
225		 * storage_partition: partition@8000 {
226		 *	label = "storage";
227		 *	reg = <0x0008000 DT_SIZE_K(32)>;
228		 * };
229		 */
230
231		/* application image slot: 256KB */
232		slot0_partition: partition@20000 {
233			label = "image-0";
234			reg = <0x00020000 DT_SIZE_K(256)>;
235		};
236
237		/* backup slot: 256KB */
238		slot1_partition: partition@60000 {
239			label = "image-1";
240			reg = <0x00060000 DT_SIZE_K(256)>;
241		};
242
243		/* swap slot: 128KB */
244		scratch_partition: partition@a0000 {
245			label = "image-scratch";
246			reg = <0x000a0000 DT_SIZE_K(128)>;
247		};
248	};
249};
250
251&vref {
252	status = "okay";
253};
254
255&vbat {
256	status = "okay";
257};
258