1/*
2 * Copyright (c) 2023 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/h5/stm32h573Xi.dtsi>
9#include <st/h5/stm32h573iikxq-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
13#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14#include <zephyr/dt-bindings/memory-controller/stm32-fmc-nor-psram.h>
15#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
16/ {
17	model = "STMicroelectronics STM32H573I DISCOVERY KIT board";
18	compatible = "st,stm32h573i-dk";
19
20	chosen {
21		zephyr,console = &usart1;
22		zephyr,shell-uart = &usart1;
23		zephyr,sram = &sram1;
24		zephyr,flash = &flash0;
25		zephyr,code-partition = &slot0_partition;
26		zephyr,canbus = &fdcan1;
27		zephyr,display = &st7789v;
28	};
29
30	leds {
31		compatible = "gpio-leds";
32
33		green_led_0: led_1 {
34			gpios = <&gpioi 9 GPIO_ACTIVE_LOW>;
35			label = "User LD1";
36		};
37
38		orange_led_0: led_2 {
39			gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
40			label = "User LD2";
41		};
42
43		red_led_0: led_3 {
44			gpios = <&gpiof 1 GPIO_ACTIVE_LOW>;
45			label = "User LD3";
46		};
47
48		blue_led_0: led_4 {
49			gpios = <&gpiof 4 GPIO_ACTIVE_LOW>;
50			label = "User LD4";
51		};
52	};
53
54	gpio_keys {
55		compatible = "gpio-keys";
56
57		user_button: button {
58			label = "User";
59			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
60			zephyr,code = <INPUT_KEY_0>;
61		};
62	};
63
64	lcd_bl_ctrl {
65		compatible = "regulator-fixed";
66		regulator-name = "LCD Backlight Driver";
67		enable-gpios = <&gpioi 3 GPIO_ACTIVE_HIGH>;
68		regulator-boot-on;
69	};
70
71	aliases {
72		led0 = &blue_led_0;
73		sw0 = &user_button;
74		watchdog0 = &iwdg;
75		die-temp0 = &die_temp;
76		die-temp1 = &digi_die_temp;
77		volt-sensor0 = &vref;
78		volt-sensor1 = &vbat;
79	};
80
81	ext_memory: memory@90000000 {
82		compatible = "zephyr,memory-region";
83		reg = <0x90000000 DT_SIZE_M(64)>;
84		zephyr,memory-region = "EXTMEM";
85		/* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */
86		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
87	};
88
89	lvgl_pointer {
90		compatible = "zephyr,lvgl-pointer-input";
91		input = <&ft3267>;
92		display = <&st7789v>;
93		invert-y;
94	};
95};
96
97&fmc {
98	pinctrl-0 = <&fmc_a0_pf0 &fmc_ne1_pc7 &fmc_nwe_pd5 &fmc_noe_pd4
99		     &fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1
100		     &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10
101		     &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14
102		     &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>;
103	pinctrl-names = "default";
104	status = "okay";
105
106	sram {
107		compatible = "st,stm32-fmc-nor-psram";
108
109		#address-cells = <1>;
110		#size-cells = <0>;
111
112		bank@0 {
113			reg = <STM32_FMC_NORSRAM_BANK1>;
114			st,control = <STM32_FMC_DATA_ADDRESS_MUX_DISABLE
115				      STM32_FMC_MEMORY_TYPE_SRAM
116				      STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16
117				      STM32_FMC_BURST_ACCESS_MODE_DISABLE
118				      STM32_FMC_WAIT_SIGNAL_POLARITY_LOW
119				      STM32_FMC_WAIT_TIMING_BEFORE_WS
120				      STM32_FMC_WRITE_OPERATION_ENABLE
121				      STM32_FMC_WAIT_SIGNAL_DISABLE
122				      STM32_FMC_EXTENDED_MODE_DISABLE
123				      STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE
124				      STM32_FMC_WRITE_BURST_DISABLE
125				      STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY
126				      STM32_FMC_WRITE_FIFO_DISABLE
127				      STM32_FMC_PAGE_SIZE_NONE>;
128			st,timing = <1 1 32 0 2 2 STM32_FMC_ACCESS_MODE_A>;
129
130			fmc-mipi-dbi {
131				compatible = "st,stm32-fmc-mipi-dbi";
132				reset-gpios = <&gpioh 13 GPIO_ACTIVE_LOW>;
133				power-gpios = <&gpioc 6 GPIO_ACTIVE_LOW>;
134				register-select-pin = <0>;
135				#address-cells = <1>;
136				#size-cells = <0>;
137
138				st7789v: lcd-panel@0 {
139					compatible = "sitronix,st7789v";
140					reg = <0>;
141					mipi-mode = "MIPI_DBI_MODE_8080_BUS_16_BIT";
142					/* A write cycle should be 68ns */
143					mipi-max-frequency = <14705882>;
144					width = <240>;
145					height = <240>;
146					x-offset = <0>;
147					y-offset = <0>;
148					vcom = <0x1F>;
149					gctrl = <0x35>;
150					vdvs = <0x20>;
151					mdac = <0x00>;
152					gamma = <0x01>;
153					colmod = <0x05>;
154					lcm = <0x2c>;
155					porch-param = [0c 0c 00 33 33];
156					cmd2en-param = [5a 69 02 00];
157					pwctrl1-param = [a4 a1];
158					pvgam-param = [D0 08 11 08 0C 15 39 33 50 36 13 14 29 2D];
159					nvgam-param = [D0 08 10 08 06 06 39 44 51 0B 16 14 2F 31];
160					ram-param = [00 F0];
161					rgb-param = [40 02 14];
162				};
163			};
164		};
165	};
166};
167
168&clk_hsi48 {
169	status = "okay";
170};
171
172&clk_lse {
173	status = "okay";
174};
175
176&clk_hse {
177	clock-frequency = <DT_FREQ_M(25)>;
178	hse-bypass; /* X3 is a 25MHz oscillator on PH0 */
179	status = "okay";
180};
181
182&pll {
183	div-m = <5>;
184	mul-n = <96>;
185	div-p = <2>;
186	div-q = <6>;
187	div-r = <2>;
188	clocks = <&clk_hse>;
189	status = "okay";
190};
191
192&rcc {
193	clocks = <&pll>;
194	clock-frequency = <DT_FREQ_M(240)>;
195	ahb-prescaler = <1>;
196	apb1-prescaler = <2>;
197	apb2-prescaler = <1>;
198	apb3-prescaler = <1>;
199};
200
201&i2c1 {
202	pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
203	pinctrl-names = "default";
204	clock-frequency = <I2C_BITRATE_FAST>;
205	status = "okay";
206};
207
208&i2c2 {
209	pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
210	pinctrl-names = "default";
211	clock-frequency = <I2C_BITRATE_FAST>;
212	status = "okay";
213};
214
215&i2c4 {
216	pinctrl-0 = <&i2c4_scl_pb8 &i2c4_sda_pb9>;
217	pinctrl-names = "default";
218	clock-frequency = <I2C_BITRATE_FAST>;
219	status = "okay";
220
221	ft3267: ft3267@38 {
222		compatible = "focaltech,ft5336";
223		reg = <0x38>;
224		int-gpios = <&gpiog 7 GPIO_ACTIVE_LOW>;
225		reset-gpios = <&gpiog 3 GPIO_ACTIVE_LOW>;
226	};
227};
228
229&usart1 {
230	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
231	pinctrl-names = "default";
232	current-speed = <115200>;
233	status = "okay";
234};
235
236&usart3 {
237	pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
238	pinctrl-names = "default";
239	current-speed = <115200>;
240	status = "okay";
241};
242
243&timers2 {
244	st,prescaler = <10000>;
245	status = "okay";
246
247	pwm2: pwm {
248		status = "okay";
249		pinctrl-0 = <&tim2_ch4_pa3>;
250		pinctrl-names = "default";
251	};
252};
253
254&timers3 {
255	st,prescaler = <10000>;
256	status = "okay";
257
258	pwm3: pwm {
259		status = "okay";
260		pinctrl-0 = <&tim3_ch2_pb5>;
261		pinctrl-names = "default";
262	};
263};
264
265&aes {
266	status = "okay";
267};
268
269&rng {
270	status = "okay";
271};
272
273&mac {
274	status = "okay";
275	pinctrl-0 = <&eth_rxd0_pc4
276		     &eth_rxd1_pc5
277		     &eth_ref_clk_pa1
278		     &eth_crs_dv_pa7
279		     &eth_tx_en_pg11
280		     &eth_txd0_pg13
281		     &eth_txd1_pg12>;
282	pinctrl-names = "default";
283	phy-connection-type = "rmii";
284	phy-handle = <&eth_phy>;
285};
286
287&mdio {
288	status = "okay";
289	pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
290	pinctrl-names = "default";
291
292	eth_phy: ethernet-phy@0 {
293		compatible = "ethernet-phy";
294		reg = <0x00>;
295	};
296};
297
298&flash0 {
299	partitions {
300		compatible = "fixed-partitions";
301		#address-cells = <1>;
302		#size-cells = <1>;
303
304		/* Set the partitions with first MB to make use of the whole Bank1 */
305		boot_partition: partition@0 {
306			label = "mcuboot";
307			reg = <0x00000000 DT_SIZE_K(64)>;
308		};
309
310		/* Set 64KB of storage at the end of Bank1 */
311		storage_partition: partition@f0000 {
312			label = "storage";
313			reg = <0x000f0000 DT_SIZE_K(64)>;
314		};
315	};
316};
317
318&rtc {
319	clocks = <&rcc STM32_CLOCK(APB3, 21)>,
320		 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
321	status = "okay";
322};
323
324&iwdg {
325	status = "okay";
326};
327
328&gpdma1 {
329	status = "okay";
330};
331
332&gpdma2 {
333	status = "okay";
334};
335
336&dac1 {
337	/* only 2 output channels : out1 on pa4 or out2 on pa5 */
338	pinctrl-0 = <&dac1_out1_pa4>;  /* Arduino A1 */
339	pinctrl-names = "default";
340	status = "okay";
341};
342
343&adc1 {
344	clocks = <&rcc STM32_CLOCK(AHB2, 10)>,
345		 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
346	pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A5 */
347	pinctrl-names = "default";
348	st,adc-clock-source = "ASYNC";
349	st,adc-prescaler = <6>;
350	status = "okay";
351};
352
353&spi2 {
354	pinctrl-0 = <&spi2_nss_pa3 &spi2_sck_pi1
355		     &spi2_miso_pi2 &spi2_mosi_pb15>;
356	pinctrl-names = "default";
357	status = "okay";
358};
359
360&fdcan1 {
361	clocks = <&rcc STM32_CLOCK(APB1_2, 9)>,
362		<&rcc STM32_SRC_PLL1_Q FDCAN_SEL(1)>;
363	pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
364	pinctrl-names = "default";
365	status = "okay";
366};
367
368&xspi1 {
369	pinctrl-0 = <&octospi1_io0_pb1 &octospi1_io1_pd12
370		     &octospi1_io2_pc2 &octospi1_io3_pd13
371		     &octospi1_io4_ph2 &octospi1_io5_ph3
372		     &octospi1_io6_pg9 &octospi1_io7_pc0
373		     &octospi1_clk_pf10 &octospi1_ncs_pg6
374		     &octospi1_dqs_pb2>;
375	pinctrl-names = "default";
376
377	status = "okay";
378
379	mx25lm51245: ospi-nor-flash@0 {
380		compatible = "st,stm32-xspi-nor";
381		reg = <0>;
382		size = <DT_SIZE_M(512)>; /* 512 Mbits */
383		ospi-max-frequency = <DT_FREQ_M(50)>;
384		spi-bus-width = <XSPI_OCTO_MODE>;
385		data-rate = <XSPI_DTR_TRANSFER>;
386		four-byte-opcodes;
387		status = "okay";
388
389		partitions {
390			compatible = "fixed-partitions";
391			#address-cells = <1>;
392			#size-cells = <1>;
393
394			slot0_partition: partition@0 {
395				label = "image-0";
396				reg = <0x00000000 DT_SIZE_M(16)>;
397			};
398
399			slot1_partition: partition@1000000 {
400				label = "image-1";
401				reg = <0x01000000 DT_SIZE_M(16)>;
402			};
403
404			scratch_partition: partition@2000000 {
405				label = "image-scratch";
406				reg = <0x02000000 DT_SIZE_M(24)>;
407			};
408		};
409	};
410};
411
412&sdmmc1 {
413	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
414		     &sdmmc1_d2_pc10 &sdmmc1_d3_pc11
415		     &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
416	pinctrl-names = "default";
417	cd-gpios = <&gpioh 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
418	disk-name = "SD";
419	status = "okay";
420};
421
422
423zephyr_udc0: &usb {
424	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
425	pinctrl-names = "default";
426	status = "okay";
427};
428
429&die_temp {
430	status = "okay";
431};
432
433&digi_die_temp {
434	status = "okay";
435};
436
437&vref {
438	status = "okay";
439};
440
441&vbat {
442	status = "okay";
443};
444