1 /*
2  * Copyright (c) 2025 Cypress Semiconductor Corporation (an Infineon company) or
3  * an affiliate of Cypress Semiconductor Corporation
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @brief Clock control driver for Infineon CAT1 MCU family.
10  */
11 
12 #include <zephyr/drivers/clock_control.h>
13 #include <zephyr/kernel.h>
14 #include <stdlib.h>
15 
16 #include <zephyr/drivers/clock_control/clock_control_ifx_cat1.h>
17 #include <zephyr/dt-bindings/clock/ifx_clock_source_def.h>
18 #include <cy_sysclk.h>
19 
20 #define DT_DRV_COMPAT infineon_fixed_clock
21 
22 struct fixed_rate_clock_config {
23 	uint32_t rate;
24 	uint32_t id; /* ifx_cat1_clock_block */
25 };
26 
fixed_rate_clk_init(const struct device * dev)27 static int fixed_rate_clk_init(const struct device *dev)
28 {
29 	const struct fixed_rate_clock_config *const config = dev->config;
30 
31 	switch (config->id) {
32 
33 	case IFX_CAT1_CLOCK_BLOCK_IMO:
34 		break;
35 
36 	case IFX_CAT1_CLOCK_BLOCK_FLL:
37 		break;
38 
39 	case IFX_CAT1_CLOCK_BLOCK_IHO:
40 		Cy_SysClk_IhoEnable();
41 		break;
42 
43 	default:
44 		break;
45 	}
46 
47 	return 0;
48 }
49 
50 #define FIXED_CLK_INIT(idx)                                                                        \
51 	static const struct fixed_rate_clock_config fixed_rate_clock_config_##idx = {              \
52 		.rate = DT_INST_PROP(idx, clock_frequency),                                        \
53 		.id = DT_INST_PROP(idx, clock_block),                                              \
54 	};                                                                                         \
55 	DEVICE_DT_INST_DEFINE(idx, fixed_rate_clk_init, NULL, NULL,                                \
56 			      &fixed_rate_clock_config_##idx, PRE_KERNEL_1,                        \
57 			      CONFIG_CLOCK_CONTROL_INIT_PRIORITY, NULL);
58 
59 DT_INST_FOREACH_STATUS_OKAY(FIXED_CLK_INIT)
60