1 /*
2 * Copyright (c) 2023 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/kernel.h>
8 #include <zephyr/drivers/gpio.h>
9 #include <soc.h>
10
pin_delay_asm(uint32_t delay)11 static ALWAYS_INLINE void pin_delay_asm(uint32_t delay)
12 {
13 #if defined(CONFIG_CPU_CORTEX_M)
14 __asm volatile (".syntax unified\n"
15 ".start_%=:\n"
16 "subs %0, #1\n"
17 "bne .start_%=\n"
18 : "+l" (delay)
19 :
20 : "cc"
21 );
22 #else
23 #warning "Pin delay is not defined"
24 #endif
25 }
26
27 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
28
29 #include "swdp_ll_pin_nrf.h"
30
31 #elif defined(CONFIG_SOC_FAMILY_STM32)
32
33 #include "swdp_ll_pin_stm32.h"
34
35 #else
36
37 #define CPU_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
38 #define FAST_BITBANG_HW_SUPPORT 0
39
swdp_ll_pin_input(void * const base,uint8_t pin)40 static ALWAYS_INLINE void swdp_ll_pin_input(void *const base, uint8_t pin)
41 {
42 }
43
swdp_ll_pin_output(void * const base,uint8_t pin)44 static ALWAYS_INLINE void swdp_ll_pin_output(void *const base, uint8_t pin)
45 {
46 }
47
48
swdp_ll_pin_set(void * const base,uint8_t pin)49 static ALWAYS_INLINE void swdp_ll_pin_set(void *const base, uint8_t pin)
50 {
51 }
52
swdp_ll_pin_clr(void * const base,uint8_t pin)53 static ALWAYS_INLINE void swdp_ll_pin_clr(void *const base, uint8_t pin)
54 {
55 }
56
swdp_ll_pin_get(void * const base,uint8_t pin)57 static ALWAYS_INLINE uint32_t swdp_ll_pin_get(void *const base, uint8_t pin)
58 {
59 return 0UL;
60 }
61
62 #endif
63
64 #ifndef CPU_CLOCK
65 #error "CPU_CLOCK not defined by any soc specific driver"
66 #endif
67
68 #ifndef FAST_BITBANG_HW_SUPPORT
69 #error "FAST_BITBANG_HW_SUPPORT not defined by any soc specific driver"
70 #endif
71