1 /*
2 * Copyright (c) 2021, Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nordic_nrf_gpio
8
9 #include <nrfx_gpiote.h>
10 #include <string.h>
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
13 #include <zephyr/irq.h>
14 #include <zephyr/pm/device.h>
15 #include <zephyr/pm/device_runtime.h>
16
17 #include <zephyr/drivers/gpio/gpio_utils.h>
18
19 #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_gpio_pad_group)
20 #define GPIO_HAS_PAD_GROUP 1
21 #else
22 #define GPIO_HAS_PAD_GROUP 0
23 #endif
24
25 #define GPIOTE_PHANDLE(id) DT_INST_PHANDLE(id, gpiote_instance)
26 #define GPIOTE_PROP(idx, prop) DT_PROP(GPIOTE(idx), prop)
27
28 #define IS_NO_PORT_INSTANCE(id) DT_PROP_OR(GPIOTE_PHANDLE(id), no_port_event, 0) ||
29 #define IS_FIXED_CH_INSTANCE(id) DT_PROP_OR(GPIOTE_PHANDLE(id), fixed_channels_supported, 0) ||
30
31 #if DT_INST_FOREACH_STATUS_OKAY(IS_NO_PORT_INSTANCE) 0
32 #define GPIOTE_NO_PORT_EVT_SUPPORT 1
33 #endif
34
35 #if DT_INST_FOREACH_STATUS_OKAY(IS_FIXED_CH_INSTANCE) 0
36 #define GPIOTE_FIXED_CH_SUPPORT 1
37 #endif
38
39 #if defined(GPIOTE_NO_PORT_EVT_SUPPORT) || defined(GPIOTE_FIXED_CH_SUPPORT)
40 #define GPIOTE_FEATURE_FLAG 1
41 #define GPIOTE_FLAG_NO_PORT_EVT BIT(0)
42 #define GPIOTE_FLAG_FIXED_CHAN BIT(1)
43 #endif
44
45 struct gpio_nrfx_data {
46 /* gpio_driver_data needs to be first */
47 struct gpio_driver_data common;
48 sys_slist_t callbacks;
49 };
50
51 struct gpio_nrfx_cfg {
52 /* gpio_driver_config needs to be first */
53 struct gpio_driver_config common;
54 NRF_GPIO_Type *port;
55 uint32_t edge_sense;
56 uint8_t port_num;
57 nrfx_gpiote_t gpiote;
58 #if GPIO_HAS_PAD_GROUP
59 const struct device *pad_group;
60 #endif
61 #if defined(GPIOTE_FEATURE_FLAG)
62 uint32_t flags;
63 #endif
64 };
65
get_port_data(const struct device * port)66 static inline struct gpio_nrfx_data *get_port_data(const struct device *port)
67 {
68 return port->data;
69 }
70
get_port_cfg(const struct device * port)71 static inline const struct gpio_nrfx_cfg *get_port_cfg(const struct device *port)
72 {
73 return port->config;
74 }
75
has_gpiote(const struct gpio_nrfx_cfg * cfg)76 static bool has_gpiote(const struct gpio_nrfx_cfg *cfg)
77 {
78 return cfg->gpiote.p_reg != NULL;
79 }
80
get_pull(gpio_flags_t flags)81 static nrf_gpio_pin_pull_t get_pull(gpio_flags_t flags)
82 {
83 if (flags & GPIO_PULL_UP) {
84 return NRF_GPIO_PIN_PULLUP;
85 } else if (flags & GPIO_PULL_DOWN) {
86 return NRF_GPIO_PIN_PULLDOWN;
87 }
88
89 return NRF_GPIO_PIN_NOPULL;
90 }
91
gpio_nrfx_pin_configure(const struct device * port,gpio_pin_t pin,gpio_flags_t flags)92 static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
93 gpio_flags_t flags)
94 {
95 int ret = 0;
96 nrfx_err_t err = NRFX_SUCCESS;
97 uint8_t ch;
98 bool free_ch = false;
99 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
100 nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
101 nrf_gpio_pin_pull_t pull = get_pull(flags);
102 nrf_gpio_pin_drive_t drive;
103 int pm_ret;
104
105 switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
106 case NRF_GPIO_DRIVE_S0S1:
107 drive = NRF_GPIO_PIN_S0S1;
108 break;
109 case NRF_GPIO_DRIVE_S0H1:
110 drive = NRF_GPIO_PIN_S0H1;
111 break;
112 case NRF_GPIO_DRIVE_H0S1:
113 drive = NRF_GPIO_PIN_H0S1;
114 break;
115 case NRF_GPIO_DRIVE_H0H1:
116 drive = NRF_GPIO_PIN_H0H1;
117 break;
118 case NRF_GPIO_DRIVE_S0 | GPIO_OPEN_DRAIN:
119 drive = NRF_GPIO_PIN_S0D1;
120 break;
121 case NRF_GPIO_DRIVE_H0 | GPIO_OPEN_DRAIN:
122 drive = NRF_GPIO_PIN_H0D1;
123 break;
124 case NRF_GPIO_DRIVE_S1 | GPIO_OPEN_SOURCE:
125 drive = NRF_GPIO_PIN_D0S1;
126 break;
127 case NRF_GPIO_DRIVE_H1 | GPIO_OPEN_SOURCE:
128 drive = NRF_GPIO_PIN_D0H1;
129 break;
130 default:
131 return -EINVAL;
132 }
133
134 ret = pm_device_runtime_get(port);
135 if (ret < 0) {
136 return ret;
137 }
138
139 if (flags & GPIO_OUTPUT_INIT_HIGH) {
140 nrf_gpio_port_out_set(cfg->port, BIT(pin));
141 } else if (flags & GPIO_OUTPUT_INIT_LOW) {
142 nrf_gpio_port_out_clear(cfg->port, BIT(pin));
143 }
144
145 if (!has_gpiote(cfg)) {
146 nrf_gpio_pin_dir_t dir = (flags & GPIO_OUTPUT)
147 ? NRF_GPIO_PIN_DIR_OUTPUT
148 : NRF_GPIO_PIN_DIR_INPUT;
149 nrf_gpio_pin_input_t input = (flags & GPIO_INPUT)
150 ? NRF_GPIO_PIN_INPUT_CONNECT
151 : NRF_GPIO_PIN_INPUT_DISCONNECT;
152
153 nrf_gpio_reconfigure(abs_pin, &dir, &input, &pull, &drive, NULL);
154
155 goto end;
156 }
157
158 /* Get the GPIOTE channel associated with this pin, if any. It needs
159 * to be freed when the pin is reconfigured or disconnected.
160 */
161 if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) {
162 err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
163 free_ch = (err == NRFX_SUCCESS);
164 }
165
166 if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
167 /* Ignore the error code. The pin may not have been used. */
168 (void)nrfx_gpiote_pin_uninit(&cfg->gpiote, abs_pin);
169 } else {
170 /* Remove previously configured trigger when pin is reconfigured. */
171 if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) {
172 nrfx_gpiote_trigger_config_t trigger_config = {
173 .trigger = NRFX_GPIOTE_TRIGGER_NONE,
174 };
175 nrfx_gpiote_input_pin_config_t input_pin_config = {
176 .p_trigger_config = &trigger_config,
177 };
178
179 err = nrfx_gpiote_input_configure(&cfg->gpiote,
180 abs_pin, &input_pin_config);
181 if (err != NRFX_SUCCESS) {
182 ret = -EINVAL;
183
184 goto end;
185 }
186 }
187
188 if (flags & GPIO_OUTPUT) {
189 nrfx_gpiote_output_config_t output_config = {
190 .drive = drive,
191 .input_connect = (flags & GPIO_INPUT)
192 ? NRF_GPIO_PIN_INPUT_CONNECT
193 : NRF_GPIO_PIN_INPUT_DISCONNECT,
194 .pull = pull,
195 };
196
197 err = nrfx_gpiote_output_configure(&cfg->gpiote,
198 abs_pin, &output_config, NULL);
199 } else {
200 nrfx_gpiote_input_pin_config_t input_pin_config = {
201 .p_pull_config = &pull,
202 };
203
204 err = nrfx_gpiote_input_configure(&cfg->gpiote,
205 abs_pin, &input_pin_config);
206 }
207
208 if (err != NRFX_SUCCESS) {
209 ret = -EINVAL;
210 goto end;
211 }
212 }
213
214 if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT) && free_ch) {
215 #ifdef GPIOTE_FEATURE_FLAG
216 /* Fixed channel was used, no need to free. */
217 if (cfg->flags & GPIOTE_FLAG_FIXED_CHAN) {
218 goto end;
219 }
220 #endif
221 err = nrfx_gpiote_channel_free(&cfg->gpiote, ch);
222 __ASSERT_NO_MSG(err == NRFX_SUCCESS);
223 }
224
225 end:
226 pm_ret = pm_device_runtime_put(port);
227
228 return (ret != 0) ? ret : pm_ret;
229 }
230
231 #ifdef CONFIG_GPIO_GET_CONFIG
gpio_nrfx_pin_get_config(const struct device * port,gpio_pin_t pin,gpio_flags_t * flags)232 static int gpio_nrfx_pin_get_config(const struct device *port, gpio_pin_t pin,
233 gpio_flags_t *flags)
234 {
235 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
236 nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
237
238 *flags = 0U;
239
240 nrf_gpio_pin_dir_t dir = nrf_gpio_pin_dir_get(abs_pin);
241
242 if (dir == NRF_GPIO_PIN_DIR_OUTPUT) {
243 *flags |= GPIO_OUTPUT;
244 *flags |= nrf_gpio_pin_out_read(abs_pin)
245 ? GPIO_OUTPUT_INIT_HIGH
246 : GPIO_OUTPUT_INIT_LOW;
247 }
248
249 nrf_gpio_pin_input_t input = nrf_gpio_pin_input_get(abs_pin);
250
251 if (input == NRF_GPIO_PIN_INPUT_CONNECT) {
252 *flags |= GPIO_INPUT;
253 }
254
255 nrf_gpio_pin_pull_t pull = nrf_gpio_pin_pull_get(abs_pin);
256
257 switch (pull) {
258 case NRF_GPIO_PIN_PULLUP:
259 *flags |= GPIO_PULL_UP;
260 break;
261 case NRF_GPIO_PIN_PULLDOWN:
262 *flags |= GPIO_PULL_DOWN;
263 break;
264 default:
265 break;
266 }
267
268 nrf_gpio_pin_drive_t drive = nrf_gpio_pin_drive_get(abs_pin);
269
270 switch (drive) {
271 case NRF_GPIO_PIN_S0S1:
272 *flags |= NRF_GPIO_DRIVE_S0S1;
273 break;
274 case NRF_GPIO_PIN_S0H1:
275 *flags |= NRF_GPIO_DRIVE_S0H1;
276 break;
277 case NRF_GPIO_PIN_H0S1:
278 *flags |= NRF_GPIO_DRIVE_H0S1;
279 break;
280 case NRF_GPIO_PIN_H0H1:
281 *flags |= NRF_GPIO_DRIVE_H0H1;
282 break;
283 case NRF_GPIO_PIN_S0D1:
284 *flags |= NRF_GPIO_DRIVE_S0 | GPIO_OPEN_DRAIN;
285 break;
286 case NRF_GPIO_PIN_H0D1:
287 *flags |= NRF_GPIO_DRIVE_H0 | GPIO_OPEN_DRAIN;
288 break;
289 case NRF_GPIO_PIN_D0S1:
290 *flags |= NRF_GPIO_DRIVE_S1 | GPIO_OPEN_SOURCE;
291 break;
292 case NRF_GPIO_PIN_D0H1:
293 *flags |= NRF_GPIO_DRIVE_H1 | GPIO_OPEN_SOURCE;
294 break;
295 default:
296 break;
297 }
298
299 return 0;
300 }
301 #endif
302
gpio_nrfx_port_get_raw(const struct device * port,gpio_port_value_t * value)303 static int gpio_nrfx_port_get_raw(const struct device *port,
304 gpio_port_value_t *value)
305 {
306 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
307
308 *value = nrf_gpio_port_in_read(reg);
309
310 return 0;
311 }
312
gpio_nrfx_port_set_masked_raw(const struct device * port,gpio_port_pins_t mask,gpio_port_value_t value)313 static int gpio_nrfx_port_set_masked_raw(const struct device *port,
314 gpio_port_pins_t mask,
315 gpio_port_value_t value)
316 {
317 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
318 int ret;
319
320 const uint32_t set_mask = value & mask;
321 const uint32_t clear_mask = (~set_mask) & mask;
322
323 ret = pm_device_runtime_get(port);
324 if (ret < 0) {
325 return ret;
326 }
327
328 nrf_gpio_port_out_set(reg, set_mask);
329 nrf_gpio_port_out_clear(reg, clear_mask);
330 return pm_device_runtime_put(port);
331 }
332
gpio_nrfx_port_set_bits_raw(const struct device * port,gpio_port_pins_t mask)333 static int gpio_nrfx_port_set_bits_raw(const struct device *port,
334 gpio_port_pins_t mask)
335 {
336 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
337 int ret;
338
339 ret = pm_device_runtime_get(port);
340 if (ret < 0) {
341 return ret;
342 }
343
344 nrf_gpio_port_out_set(reg, mask);
345 return pm_device_runtime_put(port);
346 }
347
gpio_nrfx_port_clear_bits_raw(const struct device * port,gpio_port_pins_t mask)348 static int gpio_nrfx_port_clear_bits_raw(const struct device *port,
349 gpio_port_pins_t mask)
350 {
351 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
352 int ret;
353
354 ret = pm_device_runtime_get(port);
355 if (ret < 0) {
356 return ret;
357 }
358
359 nrf_gpio_port_out_clear(reg, mask);
360 return pm_device_runtime_put(port);
361 }
362
gpio_nrfx_port_toggle_bits(const struct device * port,gpio_port_pins_t mask)363 static int gpio_nrfx_port_toggle_bits(const struct device *port,
364 gpio_port_pins_t mask)
365 {
366 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
367 const uint32_t value = nrf_gpio_port_out_read(reg) ^ mask;
368 const uint32_t set_mask = value & mask;
369 const uint32_t clear_mask = (~value) & mask;
370 int ret;
371
372 ret = pm_device_runtime_get(port);
373 if (ret < 0) {
374 return ret;
375 }
376
377 nrf_gpio_port_out_set(reg, set_mask);
378 nrf_gpio_port_out_clear(reg, clear_mask);
379 return pm_device_runtime_put(port);
380 }
381
382 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
get_trigger(enum gpio_int_mode mode,enum gpio_int_trig trig)383 static nrfx_gpiote_trigger_t get_trigger(enum gpio_int_mode mode,
384 enum gpio_int_trig trig)
385 {
386 if (mode == GPIO_INT_MODE_LEVEL) {
387 return trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_LOW :
388 NRFX_GPIOTE_TRIGGER_HIGH;
389 }
390
391 return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
392 trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_HITOLO :
393 NRFX_GPIOTE_TRIGGER_LOTOHI;
394 }
395
chan_alloc(const struct gpio_nrfx_cfg * cfg,gpio_pin_t pin,uint8_t * ch)396 static nrfx_err_t chan_alloc(const struct gpio_nrfx_cfg *cfg, gpio_pin_t pin, uint8_t *ch)
397 {
398 #ifdef GPIOTE_FEATURE_FLAG
399 if (cfg->flags & GPIOTE_FLAG_FIXED_CHAN) {
400 /* Currently fixed channel relation is only present in one instance (GPIOTE0 on
401 * cpurad). The rules are following:
402 * - GPIOTE0 can only be used with P1 (pins 4-11) and P2 (pins (0-11))
403 * - P1: channel => pin - 4, e.g. P1.4 => channel 0, P1.5 => channel 1
404 * - P2: channel => pin % 8, e.g. P2.0 => channel 0, P2.8 => channel 0
405 */
406 nrfx_err_t err = NRFX_SUCCESS;
407
408 if (cfg->port_num == 1) {
409 if (pin < 4) {
410 err = NRFX_ERROR_INVALID_PARAM;
411 } else {
412 *ch = pin - 4;
413 }
414 } else if (cfg->port_num == 2) {
415 *ch = pin & 0x7;
416 } else {
417 err = NRFX_ERROR_INVALID_PARAM;
418 }
419
420 return err;
421 }
422 #endif
423
424 return nrfx_gpiote_channel_alloc(&cfg->gpiote, ch);
425 }
426
gpio_nrfx_pin_interrupt_configure(const struct device * port,gpio_pin_t pin,enum gpio_int_mode mode,enum gpio_int_trig trig)427 static int gpio_nrfx_pin_interrupt_configure(const struct device *port,
428 gpio_pin_t pin,
429 enum gpio_int_mode mode,
430 enum gpio_int_trig trig)
431 {
432 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
433 uint32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
434 nrfx_err_t err;
435 uint8_t ch;
436
437 if (!has_gpiote(cfg)) {
438 return -ENOTSUP;
439 }
440
441 if (mode == GPIO_INT_MODE_DISABLED) {
442 nrfx_gpiote_trigger_disable(&cfg->gpiote, abs_pin);
443
444 return 0;
445 }
446
447 nrfx_gpiote_trigger_config_t trigger_config = {
448 .trigger = get_trigger(mode, trig),
449 };
450 nrfx_gpiote_input_pin_config_t input_pin_config = {
451 .p_trigger_config = &trigger_config,
452 };
453
454 /* If edge mode is to be used and pin is not configured to use sense for
455 * edge use IN event.
456 */
457 if (!(BIT(pin) & cfg->edge_sense) &&
458 (mode == GPIO_INT_MODE_EDGE) &&
459 (nrf_gpio_pin_dir_get(abs_pin) == NRF_GPIO_PIN_DIR_INPUT)) {
460 err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
461 if (err == NRFX_ERROR_INVALID_PARAM) {
462 err = chan_alloc(cfg, pin, &ch);
463 if (err != NRFX_SUCCESS) {
464 return -ENOMEM;
465 }
466 }
467
468 trigger_config.p_in_channel = &ch;
469 } else {
470 #ifdef GPIOTE_FEATURE_FLAG
471 if (cfg->flags & GPIOTE_FLAG_NO_PORT_EVT) {
472 return -ENOTSUP;
473 }
474 #endif
475 /* If edge mode with channel was previously used and we are changing to sense or
476 * level triggered, we must free the channel.
477 */
478 err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
479 if (err == NRFX_SUCCESS) {
480 err = nrfx_gpiote_channel_free(&cfg->gpiote, ch);
481 __ASSERT_NO_MSG(err == NRFX_SUCCESS);
482 }
483 }
484
485 err = nrfx_gpiote_input_configure(&cfg->gpiote, abs_pin, &input_pin_config);
486 if (err != NRFX_SUCCESS) {
487 return -EINVAL;
488 }
489
490 nrfx_gpiote_trigger_enable(&cfg->gpiote, abs_pin, true);
491
492 return 0;
493 }
494
gpio_nrfx_manage_callback(const struct device * port,struct gpio_callback * callback,bool set)495 static int gpio_nrfx_manage_callback(const struct device *port,
496 struct gpio_callback *callback,
497 bool set)
498 {
499 return gpio_manage_callback(&get_port_data(port)->callbacks,
500 callback, set);
501 }
502 #endif /* CONFIG_GPIO_NRFX_INTERRUPT */
503
504 #ifdef CONFIG_GPIO_GET_DIRECTION
gpio_nrfx_port_get_direction(const struct device * port,gpio_port_pins_t map,gpio_port_pins_t * inputs,gpio_port_pins_t * outputs)505 static int gpio_nrfx_port_get_direction(const struct device *port,
506 gpio_port_pins_t map,
507 gpio_port_pins_t *inputs,
508 gpio_port_pins_t *outputs)
509 {
510 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
511 NRF_GPIO_Type *reg = cfg->port;
512
513 map &= cfg->common.port_pin_mask;
514
515 if (outputs != NULL) {
516 *outputs = map & nrf_gpio_port_dir_read(cfg->port);
517 }
518
519 if (inputs != NULL) {
520 *inputs = 0;
521 while (map) {
522 uint32_t pin = NRF_CTZ(map);
523 uint32_t pin_cnf = reg->PIN_CNF[pin];
524
525 /* Check if the pin has its input buffer connected. */
526 if (((pin_cnf & GPIO_PIN_CNF_INPUT_Msk) >>
527 GPIO_PIN_CNF_INPUT_Pos) ==
528 GPIO_PIN_CNF_INPUT_Connect) {
529 *inputs |= BIT(pin);
530 }
531
532 map &= ~BIT(pin);
533 }
534 }
535
536 return 0;
537 }
538 #endif /* CONFIG_GPIO_GET_DIRECTION */
539
540 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
541 /* Get port device from port id. */
get_dev(uint32_t port_id)542 static const struct device *get_dev(uint32_t port_id)
543 {
544 const struct device *dev = NULL;
545
546 #define GPIO_NRF_GET_DEV(i) \
547 else if (DT_INST_PROP(i, port) == port_id) { \
548 dev = DEVICE_DT_INST_GET(i); \
549 }
550
551 if (0) {
552 } /* Followed by else if from FOREACH macro. Done to avoid return statement in macro. */
553 DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
554 #undef GPIO_NRF_GET_DEV
555
556 return dev;
557 }
558
nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,nrfx_gpiote_trigger_t trigger,void * context)559 static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,
560 nrfx_gpiote_trigger_t trigger,
561 void *context)
562 {
563 uint32_t pin = abs_pin;
564 uint32_t port_id = nrf_gpio_pin_port_number_extract(&pin);
565 const struct device *port = get_dev(port_id);
566
567 /* If given port is handled directly by nrfx driver it might not be enabled in DT. */
568 if (port == NULL) {
569 return;
570 }
571
572 struct gpio_nrfx_data *data = get_port_data(port);
573 sys_slist_t *list = &data->callbacks;
574
575 gpio_fire_callbacks(list, port, BIT(pin));
576 }
577 #endif /* CONFIG_GPIO_NRFX_INTERRUPT */
578
579 #define GPIOTE_IRQ_HANDLER_CONNECT(node_id) \
580 IRQ_CONNECT(DT_IRQN(node_id), DT_IRQ(node_id, priority), nrfx_isr, \
581 NRFX_CONCAT(nrfx_gpiote_, DT_PROP(node_id, instance), _irq_handler), 0);
582
gpio_nrfx_pm_suspend(const struct device * port)583 static int gpio_nrfx_pm_suspend(const struct device *port)
584 {
585 #if GPIO_HAS_PAD_GROUP
586 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
587
588 return pm_device_runtime_put(cfg->pad_group);
589 #else
590 ARG_UNUSED(port);
591 return 0;
592 #endif
593 }
594
gpio_nrfx_pm_resume(const struct device * port)595 static int gpio_nrfx_pm_resume(const struct device *port)
596 {
597 #if GPIO_HAS_PAD_GROUP
598 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
599
600 return pm_device_runtime_get(cfg->pad_group);
601 #else
602 ARG_UNUSED(port);
603 return 0;
604 #endif
605 }
606
gpio_nrfx_pm_hook(const struct device * port,enum pm_device_action action)607 static int gpio_nrfx_pm_hook(const struct device *port, enum pm_device_action action)
608 {
609 int ret;
610
611 switch (action) {
612 case PM_DEVICE_ACTION_SUSPEND:
613 ret = gpio_nrfx_pm_suspend(port);
614 break;
615 case PM_DEVICE_ACTION_RESUME:
616 ret = gpio_nrfx_pm_resume(port);
617 break;
618 default:
619 ret = -ENOTSUP;
620 break;
621 }
622
623 return ret;
624 }
625
gpio_nrfx_init(const struct device * port)626 static int gpio_nrfx_init(const struct device *port)
627 {
628 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
629 nrfx_err_t err;
630
631 if (!has_gpiote(cfg)) {
632 goto pm_init;
633 }
634
635 if (nrfx_gpiote_init_check(&cfg->gpiote)) {
636 goto pm_init;
637 }
638
639 err = nrfx_gpiote_init(&cfg->gpiote, 0 /*not used*/);
640 if (err != NRFX_SUCCESS) {
641 return -EIO;
642 }
643
644 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
645 nrfx_gpiote_global_callback_set(&cfg->gpiote, nrfx_gpio_handler, NULL);
646 DT_FOREACH_STATUS_OKAY(nordic_nrf_gpiote, GPIOTE_IRQ_HANDLER_CONNECT);
647 #endif /* CONFIG_GPIO_NRFX_INTERRUPT */
648
649 pm_init:
650 return pm_device_driver_init(port, gpio_nrfx_pm_hook);
651 }
652
653 static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = {
654 .pin_configure = gpio_nrfx_pin_configure,
655 .port_get_raw = gpio_nrfx_port_get_raw,
656 .port_set_masked_raw = gpio_nrfx_port_set_masked_raw,
657 .port_set_bits_raw = gpio_nrfx_port_set_bits_raw,
658 .port_clear_bits_raw = gpio_nrfx_port_clear_bits_raw,
659 .port_toggle_bits = gpio_nrfx_port_toggle_bits,
660 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
661 .pin_interrupt_configure = gpio_nrfx_pin_interrupt_configure,
662 .manage_callback = gpio_nrfx_manage_callback,
663 #endif
664 #ifdef CONFIG_GPIO_GET_DIRECTION
665 .port_get_direction = gpio_nrfx_port_get_direction,
666 #endif
667 #ifdef CONFIG_GPIO_GET_CONFIG
668 .pin_get_config = gpio_nrfx_pin_get_config,
669 #endif
670 };
671
672 #define GPIOTE_INST(id) DT_PROP(GPIOTE_PHANDLE(id), instance)
673
674 #define GPIOTE_INSTANCE(id) \
675 COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \
676 (NRFX_GPIOTE_INSTANCE(GPIOTE_INST(id))), \
677 ({ .p_reg = NULL }))
678
679 /* Device instantiation is done with node labels because 'port_num' is
680 * the peripheral number by SoC numbering. We therefore cannot use
681 * DT_INST APIs here without wider changes.
682 */
683
684 #define GPIOTE_CHECK(id) \
685 COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \
686 (BUILD_ASSERT(DT_NODE_HAS_STATUS_OKAY(GPIOTE_PHANDLE(id)), \
687 "Please enable GPIOTE instance for used GPIO port!")), \
688 ())
689
690 #if GPIO_HAS_PAD_GROUP
691 #define GPIO_NRF_PAD_GROUP_INIT(id) \
692 .pad_group = DEVICE_DT_GET(DT_INST_CHILD(id, pad_group)),
693 #else
694 #define GPIO_NRF_PAD_GROUP_INIT(id)
695 #endif
696
697 #define GPIO_NRF_DEVICE(id) \
698 GPIOTE_CHECK(id); \
699 static const struct gpio_nrfx_cfg gpio_nrfx_p##id##_cfg = { \
700 .common = { \
701 .port_pin_mask = \
702 GPIO_PORT_PIN_MASK_FROM_DT_INST(id), \
703 }, \
704 .port = _CONCAT(NRF_P, DT_INST_PROP(id, port)), \
705 .port_num = DT_INST_PROP(id, port), \
706 .edge_sense = DT_INST_PROP_OR(id, sense_edge_mask, 0), \
707 .gpiote = GPIOTE_INSTANCE(id), \
708 GPIO_NRF_PAD_GROUP_INIT(id) \
709 IF_ENABLED(GPIOTE_FEATURE_FLAG, \
710 (.flags = \
711 (DT_PROP_OR(GPIOTE_PHANDLE(id), no_port_event, 0) ? \
712 GPIOTE_FLAG_NO_PORT_EVT : 0) | \
713 (DT_PROP_OR(GPIOTE_PHANDLE(id), fixed_channels_supported, 0) ? \
714 GPIOTE_FLAG_FIXED_CHAN : 0),) \
715 ) \
716 }; \
717 \
718 static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \
719 \
720 PM_DEVICE_DT_INST_DEFINE(id, gpio_nrfx_pm_hook); \
721 \
722 DEVICE_DT_INST_DEFINE(id, gpio_nrfx_init, \
723 PM_DEVICE_DT_INST_GET(id), \
724 &gpio_nrfx_p##id##_data, \
725 &gpio_nrfx_p##id##_cfg, \
726 PRE_KERNEL_1, \
727 CONFIG_GPIO_INIT_PRIORITY, \
728 &gpio_nrfx_drv_api_funcs);
729
730 DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_DEVICE)
731