1 /*
2 * Copyright 2022,2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/drivers/pinctrl.h>
8 #include <zephyr/init.h>
9
10 #if !defined(CONFIG_SOC_SERIES_LPC11U6X)
11 #include <fsl_clock.h>
12 #endif
13
14 /* IOCON register addresses. */
15 static uint32_t volatile *iocon[] = {
16 #if (DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(iocon)))
17 (uint32_t *)DT_REG_ADDR(DT_NODELABEL(iocon)),
18 #else
19 NULL,
20 #endif
21 #if (DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(iocon1)))
22 (uint32_t *)DT_REG_ADDR(DT_NODELABEL(iocon1)),
23 #else
24 NULL,
25 #endif
26 #if (DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(iocon2)))
27 (uint32_t *)DT_REG_ADDR(DT_NODELABEL(iocon2)),
28 #else
29 NULL,
30 #endif
31 };
32
33 #define OFFSET(mux) (((mux) & 0xFFF00000) >> 20)
34 #define TYPE(mux) (((mux) & 0xC0000) >> 18)
35 #define INDEX(mux) (((mux) & 0x38000) >> 15)
36
37 #define IOCON_TYPE_D 0x0
38 #define IOCON_TYPE_I 0x1
39 #define IOCON_TYPE_A 0x2
40
41
pinctrl_configure_pins(const pinctrl_soc_pin_t * pins,uint8_t pin_cnt,uintptr_t reg)42 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
43 {
44 for (uint8_t i = 0; i < pin_cnt; i++) {
45 uint32_t pin_mux = pins[i];
46 uint32_t offset = OFFSET(pin_mux);
47 uint8_t index = INDEX(pin_mux);
48
49 /* Check if this is an analog or i2c type pin */
50 switch (TYPE(pin_mux)) {
51 case IOCON_TYPE_D:
52 pin_mux &= Z_PINCTRL_IOCON_D_PIN_MASK;
53 break;
54 case IOCON_TYPE_I:
55 pin_mux &= Z_PINCTRL_IOCON_I_PIN_MASK;
56 break;
57 case IOCON_TYPE_A:
58 pin_mux &= Z_PINCTRL_IOCON_A_PIN_MASK;
59 break;
60 default:
61 /* Should not occur */
62 __ASSERT_NO_MSG(TYPE(pin_mux) <= IOCON_TYPE_A);
63 }
64 /* Set pinmux */
65 *(iocon[index] + offset) = pin_mux;
66
67 }
68 return 0;
69 }
70
71 #if defined(CONFIG_SOC_FAMILY_LPC) && !defined(CONFIG_SOC_SERIES_LPC11U6X)
72 /* LPC family (except 11u6x) needs iocon clock to be enabled */
73
pinctrl_clock_init(void)74 static int pinctrl_clock_init(void)
75 {
76 /* Enable IOCon clock */
77 CLOCK_EnableClock(kCLOCK_Iocon);
78 return 0;
79 }
80
81 SYS_INIT(pinctrl_clock_init, PRE_KERNEL_1, 0);
82
83 #endif /* CONFIG_SOC_FAMILY_LPC && !CONFIG_SOC_SERIES_LPC11U6X */
84