1 /*
2  * Copyright (c) 2021 Vestas Wind Systems A/S
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #define DT_DRV_COMPAT nxp_lptmr
8 
9 #include <zephyr/init.h>
10 #include <zephyr/drivers/timer/system_timer.h>
11 #include <zephyr/devicetree.h>
12 #include <zephyr/kernel.h>
13 #include <zephyr/sys/time_units.h>
14 #include <fsl_lptmr.h>
15 #include <zephyr/irq.h>
16 
17 BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
18 	     "No LPTMR instance enabled in devicetree");
19 
20 /* Prescaler mapping */
21 #define LPTMR_PRESCALER_2     kLPTMR_Prescale_Glitch_0
22 #define LPTMR_PRESCALER_4     kLPTMR_Prescale_Glitch_1
23 #define LPTMR_PRESCALER_8     kLPTMR_Prescale_Glitch_2
24 #define LPTMR_PRESCALER_16    kLPTMR_Prescale_Glitch_3
25 #define LPTMR_PRESCALER_32    kLPTMR_Prescale_Glitch_4
26 #define LPTMR_PRESCALER_64    kLPTMR_Prescale_Glitch_5
27 #define LPTMR_PRESCALER_128   kLPTMR_Prescale_Glitch_6
28 #define LPTMR_PRESCALER_256   kLPTMR_Prescale_Glitch_7
29 #define LPTMR_PRESCALER_512   kLPTMR_Prescale_Glitch_8
30 #define LPTMR_PRESCALER_1024  kLPTMR_Prescale_Glitch_9
31 #define LPTMR_PRESCALER_2048  kLPTMR_Prescale_Glitch_10
32 #define LPTMR_PRESCALER_4096  kLPTMR_Prescale_Glitch_11
33 #define LPTMR_PRESCALER_8192  kLPTMR_Prescale_Glitch_12
34 #define LPTMR_PRESCALER_16384 kLPTMR_Prescale_Glitch_13
35 #define LPTMR_PRESCALER_32768 kLPTMR_Prescale_Glitch_14
36 #define LPTMR_PRESCALER_65536 kLPTMR_Prescale_Glitch_15
37 #define TO_LPTMR_PRESCALER(val) _DO_CONCAT(LPTMR_PRESCALER_, val)
38 
39 /* Prescaler clock mapping */
40 #define TO_LPTMR_CLK_SEL(val) _DO_CONCAT(kLPTMR_PrescalerClock_, val)
41 
42 /* Devicetree properties */
43 #define LPTMR_BASE ((LPTMR_Type *)(DT_INST_REG_ADDR(0)))
44 #define LPTMR_CLK_SOURCE TO_LPTMR_CLK_SEL(DT_INST_PROP(0, clk_source));
45 #define LPTMR_PRESCALER TO_LPTMR_PRESCALER(DT_INST_PROP(0, prescaler));
46 #define LPTMR_BYPASS_PRESCALER DT_INST_PROP(0, prescaler) == 1
47 #define LPTMR_IRQN DT_INST_IRQN(0)
48 #define LPTMR_IRQ_PRIORITY DT_INST_IRQ(0, priority)
49 
50 /* Timer cycles per tick */
51 #define CYCLES_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
52 			/ (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
53 
54 /* 32 bit cycle counter */
55 static volatile uint32_t cycles;
56 
sys_clock_set_timeout(int32_t ticks,bool idle)57 void sys_clock_set_timeout(int32_t ticks, bool idle)
58 {
59 	ARG_UNUSED(idle);
60 
61 	if (idle && (ticks == K_TICKS_FOREVER)) {
62 		LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
63 	}
64 }
65 
sys_clock_idle_exit(void)66 void sys_clock_idle_exit(void)
67 {
68 	if (LPTMR_GetEnabledInterrupts(LPTMR_BASE) != kLPTMR_TimerInterruptEnable) {
69 		LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
70 	}
71 }
72 
sys_clock_disable(void)73 void sys_clock_disable(void)
74 {
75 	LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
76 	LPTMR_StopTimer(LPTMR_BASE);
77 }
78 
sys_clock_elapsed(void)79 uint32_t sys_clock_elapsed(void)
80 {
81 	return 0;
82 }
83 
sys_clock_cycle_get_32(void)84 uint32_t sys_clock_cycle_get_32(void)
85 {
86 	return LPTMR_GetCurrentTimerCount(LPTMR_BASE) + cycles;
87 }
88 
mcux_lptmr_timer_isr(const void * arg)89 static void mcux_lptmr_timer_isr(const void *arg)
90 {
91 	ARG_UNUSED(arg);
92 
93 	cycles += CYCLES_PER_TICK;
94 
95 	sys_clock_announce(1);
96 	LPTMR_ClearStatusFlags(LPTMR_BASE, kLPTMR_TimerCompareFlag);
97 }
98 
sys_clock_driver_init(void)99 static int sys_clock_driver_init(void)
100 {
101 	lptmr_config_t config;
102 
103 
104 	LPTMR_GetDefaultConfig(&config);
105 	config.timerMode = kLPTMR_TimerModeTimeCounter;
106 	config.enableFreeRunning = false;
107 	config.prescalerClockSource = LPTMR_CLK_SOURCE;
108 
109 #if LPTMR_BYPASS_PRESCALER
110 	config.bypassPrescaler = true;
111 #else /* LPTMR_BYPASS_PRESCALER */
112 	config.bypassPrescaler = false;
113 	config.value = LPTMR_PRESCALER;
114 #endif /* !LPTMR_BYPASS_PRESCALER */
115 
116 	LPTMR_Init(LPTMR_BASE, &config);
117 
118 	IRQ_CONNECT(LPTMR_IRQN, LPTMR_IRQ_PRIORITY, mcux_lptmr_timer_isr, NULL, 0);
119 	irq_enable(LPTMR_IRQN);
120 
121 	LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
122 	LPTMR_SetTimerPeriod(LPTMR_BASE, CYCLES_PER_TICK);
123 	LPTMR_StartTimer(LPTMR_BASE);
124 
125 	return 0;
126 }
127 
128 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
129 	 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
130