1# Copyright (c) 2025 Texas Instruments
2# Copyright (c) 2025 Linumiz
3# SPDX-License-Identifier: Apache-2.0
4
5description: |
6    TI MSPM0 pinctrl node.
7
8    Device pin configuration should be placed in the child nodes of this node.
9    Populate the 'pinmux' field with a pair consisting of a pin number and its
10    IO functions.
11
12    The node has the 'pinctrl' node label set in your SoC's devicetree,
13    so you can modify it like this:
14
15      &pinctrl {
16              /* your modifications go here */
17      };
18
19    All device pin configurations should be placed in child nodes of the
20    'pinctrl' node, as in the i2c0 example shown at the end.
21
22    Here is a list of
23    supported standard pin properties:
24
25    - bias-disable: Disable pull-up/down.
26    - bias-pull-down: Enable pull-down resistor.
27    - bias-pull-up: Enable pull-up resistor.
28    - drive-open-drain: Output driver is open-drain.
29    - drive-open-drain: Output driver is open-source.
30    - drive-strength: Maximum current that can be sourced from the pin.
31    - input-enable: enable input.
32    - ti,invert: enable logical inversion of a digital input or output
33    - ti,hysteresis: enable hysteresis control on open-drain pins
34
35    An example for MSPM0 family, include the chip level pinctrl
36    DTSI file in the board level DTS:
37
38      #include <dt-bindings/pinctrl/mspm0-pinctrl.h>
39
40    We want to configure the I2C pins to open drain, with pullup enabled
41    and input enabled.
42
43    To change a pin's pinctrl default properties add a reference to the
44    pin in the board's DTS file or in the project overlay and set the
45    properties.
46
47      &i2c1 {
48        pinctrl-0 = <&i2c1_scl_pb2_pull_up &i2c1_sda_pb3_pull_up>;
49        pinctrl-names = "default";
50      }
51
52    The i2c1_scl_pb2_pull_up corresponds to the following pin configuration in
53    the board dts file:
54
55      &pinctrl {
56        i2c1_scl_pb2_pull_up: i2c1_scl_pb2_pull_up {
57          pinmux = <MSP_PINMUX(15,MSPM0_PIN_FUNCTION_4)>;
58          input-enable;
59          bias-pull-up;
60          drive-open-drain;
61        };
62      };
63
64    Pin pb2 refers to the device pin name that one would see printed on the
65    launchpad, and the number 15 in the pinmux define refers to the PINCMx.
66
67    These are obtained from the device-specific datasheet.
68
69compatible: "ti,mspm0-pinctrl"
70
71include: base.yaml
72
73properties:
74  reg:
75    required: true
76
77child-binding:
78  description: |
79    This binding gives a base representation of the MSPM0
80    pins configuration.
81
82  include:
83    - name: pincfg-node.yaml
84      property-allowlist:
85        - bias-disable
86        - bias-pull-down
87        - bias-pull-up
88        - bias-high-impedance
89        - drive-open-drain
90        - drive-open-source
91        - drive-strength
92        - input-enable
93
94  properties:
95    pinmux:
96      required: true
97      type: int
98      description: |
99        MSPM0 pin's configuration (IO pin, IO function).
100
101    drive-strength:
102      enum:
103        - 6
104        - 20
105      default: 6
106      description: |
107        The drive strength controls the maximum output drive strength sunk or
108        sourced by an I/O pin.
109          6: max 6 mA (SoC default)
110          20: max 20 mA on high-drive capable IOs only (HDIO).
111
112    ti,invert:
113      type: boolean
114      description: |
115        Enables inversion of the input or output using the internal
116        inversion capability of the GPIO
117
118    ti,hysteresis:
119      type: boolean
120      description: |
121        Enables the hysteresis control for access to CMOS logic
122        (on open-drain capable pins)
123