Lines Matching refs:addr
69 uint8_t Read(const PciReg8 addr) const override;
70 uint16_t Read(const PciReg16 addr) const override;
71 uint32_t Read(const PciReg32 addr) const override;
72 void Write(const PciReg8 addr, uint8_t val) const override;
73 void Write(const PciReg16 addr, uint16_t val) const override;
74 void Write(const PciReg32 addr, uint32_t val) const override;
80 uint8_t PciPioConfig::Read(const PciReg8 addr) const { in Read()
82 zx_status_t status = Pci::PioCfgRead(static_cast<uint32_t>(base_ + addr.offset()), &val, 8u); in Read()
86 uint16_t PciPioConfig::Read(const PciReg16 addr) const { in Read()
88 zx_status_t status = Pci::PioCfgRead(static_cast<uint32_t>(base_ + addr.offset()), &val, 16u); in Read()
92 uint32_t PciPioConfig::Read(const PciReg32 addr) const { in Read()
94 zx_status_t status = Pci::PioCfgRead(static_cast<uint32_t>(base_ + addr.offset()), &val, 32u); in Read()
98 void PciPioConfig::Write(const PciReg8 addr, uint8_t val) const { in Write() argument
99 zx_status_t status = Pci::PioCfgWrite(static_cast<uint32_t>(base_ + addr.offset()), val, 8u); in Write()
102 void PciPioConfig::Write(const PciReg16 addr, uint16_t val) const { in Write() argument
103 zx_status_t status = Pci::PioCfgWrite(static_cast<uint32_t>(base_ + addr.offset()), val, 16u); in Write()
106 void PciPioConfig::Write(const PciReg32 addr, uint32_t val) const { in Write() argument
107 zx_status_t status = Pci::PioCfgWrite(static_cast<uint32_t>(base_ + addr.offset()), val, 32u); in Write()
115 uint8_t Read(const PciReg8 addr) const override;
116 uint16_t Read(const PciReg16 addr) const override;
117 uint32_t Read(const PciReg32 addr) const override;
118 void Write(const PciReg8 addr, uint8_t val) const override;
119 void Write(const PciReg16 addr, uint16_t val) const override;
120 void Write(const PciReg32 addr, uint32_t val) const override;
127 uint8_t PciMmioConfig::Read(const PciReg8 addr) const { in Read()
128 auto reg = reinterpret_cast<const volatile uint8_t*>(base_ + addr.offset()); in Read()
132 uint16_t PciMmioConfig::Read(const PciReg16 addr) const { in Read()
133 auto reg = reinterpret_cast<const volatile uint16_t*>(base_ + addr.offset()); in Read()
137 uint32_t PciMmioConfig::Read(const PciReg32 addr) const { in Read()
138 auto reg = reinterpret_cast<const volatile uint32_t*>(base_ + addr.offset()); in Read()
142 void PciMmioConfig::Write(PciReg8 addr, uint8_t val) const { in Write() argument
143 auto reg = reinterpret_cast<volatile uint8_t*>(base_ + addr.offset()); in Write()
147 void PciMmioConfig::Write(PciReg16 addr, uint16_t val) const { in Write() argument
148 auto reg = reinterpret_cast<volatile uint16_t*>(base_ + addr.offset()); in Write()
152 void PciMmioConfig::Write(PciReg32 addr, uint32_t val) const { in Write() argument
153 auto reg = reinterpret_cast<volatile uint32_t*>(base_ + addr.offset()); in Write()