Lines Matching refs:width
461 zx_status_t sys_pci_config_read(zx_handle_t handle, uint16_t offset, size_t width, in sys_pci_config_read() argument
476 if (out_val.get() == nullptr || offset + width > cfg_size) { in sys_pci_config_read()
484 switch (width) { in sys_pci_config_read()
498 zx_status_t sys_pci_config_write(zx_handle_t handle, uint16_t offset, size_t width, uint32_t val) { in sys_pci_config_write() argument
513 if (offset < ZX_PCI_STANDARD_CONFIG_HDR_SIZE || offset + width > cfg_size) { in sys_pci_config_write()
518 switch (width) { in sys_pci_config_write()
539 … uint8_t offset, user_inout_ptr<uint32_t> val, size_t width, bool write) { in sys_pci_cfg_pio_rw() argument
549 status = Pci::PioCfgWrite(bus, dev, func, offset, val_, width); in sys_pci_cfg_pio_rw()
551 status = Pci::PioCfgRead(bus, dev, func, offset, &val_, width); in sys_pci_cfg_pio_rw()
776 zx_status_t sys_pci_config_read(zx_handle_t handle, uint16_t offset, size_t width, in sys_pci_config_read() argument
782 zx_status_t sys_pci_config_write(zx_handle_t handle, uint16_t offset, size_t width, uint32_t val) { in sys_pci_config_write() argument
788 … uint8_t offset, user_inout_ptr<uint32_t> val, size_t width, bool write) { in sys_pci_cfg_pio_rw() argument