Lines Matching refs:sc

42     uint32_t route = XHCI_GET_BITS32(&hub_slot->sc->sc0, SLOT_CTX_ROUTE_STRING_START,  in xhci_get_route_string()
77 bool enumerating = slot->sc == nullptr; in xhci_address_device()
108 auto* sc = reinterpret_cast<xhci_slot_context_t*>(&xhci->input_context[1 * xhci->context_size]); in xhci_address_device() local
112 memset(sc, 0, xhci->context_size); in xhci_address_device()
115 slot->sc = reinterpret_cast<xhci_slot_context_t*>(device_context); in xhci_address_device()
127 XHCI_SET_BITS32(&sc->sc0, SLOT_CTX_ROUTE_STRING_START, SLOT_CTX_ROUTE_STRING_BITS, in xhci_address_device()
129 XHCI_SET_BITS32(&sc->sc0, SLOT_CTX_SPEED_START, SLOT_CTX_SPEED_BITS, speed); in xhci_address_device()
130 XHCI_SET_BITS32(&sc->sc0, SLOT_CTX_CONTEXT_ENTRIES_START, SLOT_CTX_CONTEXT_ENTRIES_BITS, 1); in xhci_address_device()
131 XHCI_SET_BITS32(&sc->sc1, SLOT_CTX_ROOT_HUB_PORT_NUM_START, SLOT_CTX_ROOT_HUB_PORT_NUM_BITS, in xhci_address_device()
139 tt_hub_slot_id = XHCI_GET_BITS32(&hub_slot->sc->sc2, SLOT_CTX_TT_HUB_SLOT_ID_START, in xhci_address_device()
142 tt_port_number = XHCI_GET_BITS32(&hub_slot->sc->sc2, SLOT_CTX_TT_PORT_NUM_START, in xhci_address_device()
144 mtt = XHCI_GET_BITS32(&hub_slot->sc->sc0, SLOT_CTX_MTT_START, SLOT_CTX_MTT_BITS); in xhci_address_device()
146 mtt = XHCI_GET_BITS32(&hub_slot->sc->sc0, SLOT_CTX_MTT_START, SLOT_CTX_MTT_BITS); in xhci_address_device()
152 XHCI_SET_BITS32(&sc->sc0, SLOT_CTX_MTT_START, SLOT_CTX_MTT_BITS, mtt); in xhci_address_device()
153 XHCI_SET_BITS32(&sc->sc2, SLOT_CTX_TT_HUB_SLOT_ID_START, SLOT_CTX_TT_HUB_SLOT_ID_BITS, in xhci_address_device()
155 XHCI_SET_BITS32(&sc->sc2, SLOT_CTX_TT_PORT_NUM_START, SLOT_CTX_TT_PORT_NUM_BITS, in xhci_address_device()
303 slot->sc = nullptr; in xhci_disable_slot()
732 auto* sc = reinterpret_cast<xhci_slot_context_t*>(&xhci->input_context[1 * xhci->context_size]); in xhci_enable_endpoint() local
736 memset(sc, 0, xhci->context_size); in xhci_enable_endpoint()
800 XHCI_WRITE32(&sc->sc0, XHCI_READ32(&slot->sc->sc0)); in xhci_enable_endpoint()
801 XHCI_WRITE32(&sc->sc1, XHCI_READ32(&slot->sc->sc1)); in xhci_enable_endpoint()
802 XHCI_WRITE32(&sc->sc2, XHCI_READ32(&slot->sc->sc2)); in xhci_enable_endpoint()
803 XHCI_SET_BITS32(&sc->sc0, SLOT_CTX_CONTEXT_ENTRIES_START, SLOT_CTX_CONTEXT_ENTRIES_BITS, in xhci_enable_endpoint()
854 auto* sc = reinterpret_cast<xhci_slot_context_t*>(&xhci->input_context[1 * xhci->context_size]); in xhci_configure_hub() local
856 memset(sc, 0, xhci->context_size); in xhci_configure_hub()
859 XHCI_WRITE32(&sc->sc0, XHCI_READ32(&slot->sc->sc0) | SLOT_CTX_HUB); in xhci_configure_hub()
860 XHCI_WRITE32(&sc->sc1, XHCI_READ32(&slot->sc->sc1)); in xhci_configure_hub()
861 XHCI_WRITE32(&sc->sc2, XHCI_READ32(&slot->sc->sc2)); in xhci_configure_hub()
863 XHCI_SET_BITS32(&sc->sc1, SLOT_CTX_ROOT_NUM_PORTS_START, SLOT_CTX_ROOT_NUM_PORTS_BITS, in xhci_configure_hub()
865 XHCI_SET_BITS32(&sc->sc2, SLOT_CTX_TTT_START, SLOT_CTX_TTT_BITS, ttt); in xhci_configure_hub()