1 // Copyright 2018 The Fuchsia Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #pragma once 6 7 #define A113_GPIOX_START 0 8 #define A113_GPIOA_START 23 9 #define A113_GPIOBOOT_START (A113_GPIOA_START + 21) 10 #define A113_GPIOY_START (A113_GPIOBOOT_START + 15) 11 #define A113_GPIOZ_START (A113_GPIOY_START + 16) 12 #define A113_GPIOAO_START (A113_GPIOZ_START + 11) 13 14 #define A113_GPIOX(n) (A113_GPIOX_START + n) 15 #define A113_GPIOA(n) (A113_GPIOA_START + n) 16 #define A113_GPIOBOOT(n) (A113_GPIOBOOT_START + n) 17 #define A113_GPIOY(n) (A113_GPIOY_START + n) 18 #define A113_GPIOZ(n) (A113_GPIOZ_START + n) 19 #define A113_GPIOAO(n) (A113_GPIOAO_START + n) 20 21 #define A113_GPIO_REG0_EN_N 0x0c 22 #define A113_GPIO_REG0_O 0x0d 23 #define A113_GPIO_REG0_I 0x0e 24 #define A113_GPIO_REG1_EN_N 0x0f 25 #define A113_GPIO_REG1_O 0x10 26 #define A113_GPIO_REG1_I 0x11 27 #define A113_GPIO_REG2_EN_N 0x12 28 #define A113_GPIO_REG2_O 0x13 29 #define A113_GPIO_REG2_I 0x14 30 #define A113_GPIO_REG3_EN_N 0x15 31 #define A113_GPIO_REG3_O 0x16 32 #define A113_GPIO_REG3_I 0x17 33 #define A113_GPIO_REG4_EN_N 0x18 34 #define A113_GPIO_REG4_O 0x19 35 #define A113_GPIO_REG4_I 0x1a 36 37 #define A113_GPIO_PULL_UP_REG0 0x3a 38 #define A113_GPIO_PULL_UP_REG1 0x3b 39 #define A113_GPIO_PULL_UP_REG2 0x3c 40 #define A113_GPIO_PULL_UP_REG3 0x3d 41 #define A113_GPIO_PULL_UP_REG4 0x3e 42 43 #define A113_GPIO_PULL_UP_EN_REG0 0x48 44 #define A113_GPIO_PULL_UP_EN_REG1 0x49 45 #define A113_GPIO_PULL_UP_EN_REG2 0x4a 46 #define A113_GPIO_PULL_UP_EN_REG3 0x4b 47 #define A113_GPIO_PULL_UP_EN_REG4 0x4c 48 49 #define A113_PERIPHS_PIN_MUX_0 0x20 50 #define A113_PERIPHS_PIN_MUX_1 0x21 51 #define A113_PERIPHS_PIN_MUX_2 0x22 52 #define A113_PERIPHS_PIN_MUX_3 0x23 53 #define A113_PERIPHS_PIN_MUX_4 0x24 54 #define A113_PERIPHS_PIN_MUX_5 0x25 55 #define A113_PERIPHS_PIN_MUX_6 0x26 56 // NOTE: A113_PERIPHS_PIN_MUX_7 is not specified by the manual 57 #define A113_PERIPHS_PIN_MUX_8 0x28 58 #define A113_PERIPHS_PIN_MUX_9 0x29 59 // NOTE: A113_PERIPHS_PIN_MUX_A is not specified by the manual 60 #define A113_PERIPHS_PIN_MUX_B 0x2b 61 #define A113_PERIPHS_PIN_MUX_C 0x2c 62 #define A113_PERIPHS_PIN_MUX_D 0x2d 63 64 // GPIO AO registers live in a separate register bank. 65 #define A113_AO_RTI_PIN_MUX_REG0 0x05 66 #define A113_AO_RTI_PIN_MUX_REG1 0x06 67 #define A113_AO_GPIO_O_EN 0x08 68 #define A113_AO_GPIO_I 0x09 69 #define A113_GPIO_AO_RTI_PULL_UP 0x0b 70 71 #define A113_GPIOA0_PIN_START 0 72 #define A113_GPIOZ_PIN_START 14 73 #define A113_GPIOBOOT_PIN_START 25 74 #define A113_GPIOA_PIN_START 40 75 #define A113_GPIOX_PIN_START 61 76 #define A113_GPIOY_PIN_START 84 77 78 // These are relative to base address 0xc1100000 and in sizeof(uint32_t) 79 #define A113_GPIO_INT_EDGE_POLARITY 0x3c20 80 #define A113_GPIO_0_3_PIN_SELECT 0x3c21 81 #define A113_GPIO_4_7_PIN_SELECT 0x3c22 82 #define A113_GPIO_FILTER_SELECT 0x3c23 83