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4   Copyright (c) 2001-2015, Intel Corporation
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33 ******************************************************************************/
34 /*$FreeBSD$*/
35 
36 #ifndef _FUCHSIA_OS_H_
37 #define _FUCHSIA_OS_H_
38 
39 #include <assert.h>
40 #include <inttypes.h>
41 #include <stdbool.h>
42 #include <stdio.h>
43 #include <stdlib.h>
44 #include <string.h>
45 #include <threads.h>
46 
47 #include <ddk/binding.h>
48 #include <ddk/debug.h>
49 #include <ddk/device.h>
50 #include <ddk/driver.h>
51 #include <ddk/io-buffer.h>
52 #include <ddk/mmio-buffer.h>
53 #include <ddk/protocol/ethernet.h>
54 #include <ddk/protocol/pci.h>
55 #include <ddk/protocol/pci-lib.h>
56 #include <hw/inout.h>
57 #include <hw/pci.h>
58 #include <hw/reg.h>
59 #include <zircon/assert.h>
60 #include <zircon/syscalls.h>
61 #include <zircon/types.h>
62 
63 #define ASSERT(x) assert(x)
64 
65 #define nsec_delay(x) zx_nanosleep(zx_deadline_after(x))
66 #define usec_delay(x) nsec_delay(ZX_USEC(x))
67 #define usec_delay_irq(x) nsec_delay(ZX_USEC(x))
68 #define msec_delay(x) nsec_delay(ZX_MSEC(x))
69 #define msec_delay_irq(x) nsec_delay(ZX_MSEC(x))
70 
71 /* Enable/disable debugging statements in shared code */
72 #define DEBUGOUT(format, ...) \
73     zxlogf(TRACE, "%s %d: " format, __FUNCTION__, __LINE__, ##__VA_ARGS__)
74 #define DEBUGOUT1(...) DEBUGOUT(__VA_ARGS__)
75 #define DEBUGOUT2(...) DEBUGOUT(__VA_ARGS__)
76 #define DEBUGOUT3(...) DEBUGOUT(__VA_ARGS__)
77 #define DEBUGFUNC(F) zxlogf(TRACE, F "\n")
78 
79 #define STATIC static
80 #define FALSE 0
81 #define TRUE 1
82 
83 #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_MEM_WR_INV_EN /* BIT_4 */
84 #define PCI_COMMAND_REGISTER PCIR_COMMAND
85 
86 typedef uint64_t u64;
87 typedef uint32_t u32;
88 typedef uint16_t u16;
89 typedef uint8_t u8;
90 typedef int64_t s64;
91 typedef int32_t s32;
92 typedef int16_t s16;
93 typedef int8_t s8;
94 
95 #define __le16 u16
96 #define __le32 u32
97 #define __le64 u64
98 
99 #define ASSERT_CTX_LOCK_HELD(hw)
100 
101 struct e1000_osdep {
102     pci_protocol_t pci;
103     uintptr_t membase;
104     uintptr_t iobase;
105     uintptr_t flashbase;
106 };
107 
108 #define hw2pci(hw) (&((struct e1000_osdep*)(hw)->back)->pci)
109 #define hw2membase(hw) (((struct e1000_osdep*)(hw)->back)->membase)
110 #define hw2iobase(hw) (((struct e1000_osdep*)(hw)->back)->iobase)
111 #define hw2flashbase(hw) (((struct e1000_osdep*)(hw)->back)->flashbase)
112 
113 #define e1000_writeb(v, a) writeb((v), (volatile void*)(uintptr_t)(a))
114 #define e1000_writew(v, a) writew((v), (volatile void*)(uintptr_t)(a))
115 #define e1000_writel(v, a) writel((v), (volatile void*)(uintptr_t)(a))
116 #define e1000_writell(v, a) writell((v), (volatile void*)(uintptr_t)(a))
117 
118 #define e1000_readb(a) readb((const volatile void*)(uintptr_t)(a))
119 #define e1000_readw(a) readw((const volatile void*)(uintptr_t)(a))
120 #define e1000_readl(a) readl((const volatile void*)(uintptr_t)(a))
121 #define e1000_readll(a) readll((const volatile void*)(uintptr_t)(a))
122 
123 #define E1000_REGISTER(hw, reg)                   \
124     (((hw)->mac.type >= e1000_82543) ? (u32)(reg) \
125                                      : e1000_translate_register_82542(reg))
126 
127 #define E1000_WRITE_FLUSH(a) \
128     E1000_READ_REG(a, E1000_STATUS)
129 
130 /* Read from an absolute offset in the adapter's memory space */
131 #define E1000_READ_OFFSET(hw, offset) \
132     e1000_readl(hw2membase(hw) + (offset))
133 
134 /* Write to an absolute offset in the adapter's memory space */
135 #define E1000_WRITE_OFFSET(hw, offset, value) \
136     e1000_writel((value), hw2membase(hw) + (offset))
137 
138 /* Register READ/WRITE macros */
139 #define E1000_READ_REG(hw, reg) \
140     E1000_READ_OFFSET((hw), E1000_REGISTER((hw), (reg)))
141 
142 #define E1000_WRITE_REG(hw, reg, value) \
143     E1000_WRITE_OFFSET((hw), E1000_REGISTER((hw), (reg)), (value))
144 
145 #define E1000_READ_REG_ARRAY(hw, reg, index) \
146     E1000_READ_OFFSET((hw), E1000_REGISTER((hw), (reg)) + ((index) << 2))
147 
148 #define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \
149     E1000_WRITE_OFFSET((hw), E1000_REGISTER((hw), (reg)) + ((index) << 2), (value))
150 
151 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
152 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
153 
154 #define E1000_READ_REG_ARRAY_BYTE(hw, reg, index) \
155     e1000_readb(hw2membase(hw) + E1000_REGISTER((hw), (reg)) + (index))
156 
157 #define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \
158     e1000_writeb((value), hw2membase(hw) + E1000_REGISTER((hw), (reg)) + (index))
159 
160 #define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \
161     e1000_writew((value), hw2membase(hw) + E1000_REGISTER((hw), (reg)) + ((index) << 1))
162 
163 #define E1000_WRITE_REG_IO(hw, reg, value) \
164     outpd(hw2iobase(hw) + (reg), (value));
165 
166 #define E1000_READ_FLASH_REG(hw, reg) \
167     e1000_readl(hw2flashbase(hw) + (reg))
168 
169 #define E1000_READ_FLASH_REG16(hw, reg) \
170     e1000_readw(hw2flashbase(hw) + (reg))
171 
172 #define E1000_WRITE_FLASH_REG(hw, reg, value) \
173     e1000_writel((value), hw2flashbase(hw) + (reg))
174 
175 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
176     e1000_writew((value), hw2flashbase(hw) + (reg))
177 
178 #define ASSERT_NO_LOCKS()
179 
180 #endif /* _FUCHSIA_OS_H_ */
181