1 // Copyright 2018 The Fuchsia Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #pragma once 6 7 // size of phy port register block 8 #define PHY_REGISTER_SIZE 32 9 #define U2P_R0_OFFSET 0x0 10 #define U2P_R1_OFFSET 0x4 11 12 #define USB_R0_OFFSET 0x80 13 #define USB_R1_OFFSET 0x84 14 #define USB_R2_OFFSET 0x88 15 #define USB_R3_OFFSET 0x8c 16 #define USB_R4_OFFSET 0x90 17 #define USB_R5_OFFSET 0x94 18 19 #define U2P_R0_HOST_DEVICE (1 << 0) 20 #define U2P_R0_POWER_OK (1 << 1) 21 #define U2P_R0_HOST_MODE (1 << 2) 22 #define U2P_R0_POR (1 << 3) 23 #define U2P_R0_IDPULLUP0 (1 << 4) 24 #define U2P_R0_DRVVBUS0 (1 << 5) 25 26 #define U2P_R1_PHY_RDY (1 << 0) 27 #define U2P_R1_IDDIG0 (1 << 1) 28 #define U2P_R1_OTGSESSVLD0 (1 << 2) 29 #define U2P_R1_VBUSVALID0 (1 << 3) 30 31 #define USB_R0_P30_LANE0_TX2RX_LOOPBACK (1 << 17) 32 #define USB_R0_P30_LANE0_EXT_PCLK_REG (1 << 18) 33 #define USB_R0_P30_PCS_RX_LOS_MASK_VAL (1 << 19) // 10 bits 34 #define USB_R0_U2D_SS_SCALEDOWN_MODE (1 << 29) // 2 bits 35 #define USB_R0_U2D_ACT (1 << 31) 36 37 #define USB_R1_U3H_BIGENDIAN_GS (1 << 0) 38 #define USB_R1_U3H_PME_EN (1 << 1) 39 #define USB_R1_U3H_HUB_PORT_OVERCURRENT (1 << 2) // 3 bits 40 #define USB_R1_U3H_HUB_PORT_PERM_ATTACH (1 << 7) // 3 bits 41 #define USB_R1_U3H_HOST_U2_PORT_DISABLE (1 << 12) // 2 bits 42 #define USB_R1_U3H_HOST_U3_PORT_DISABLE (1 << 16) 43 #define USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT (1 << 17) 44 #define USB_R1_U3H_HOST_MSI_ENABLE (1 << 18) 45 #define USB_R1_U3H_FLADJ_30MHZ_REG (1 << 19) // 6 bits 46 #define USB_R1_P30_PCS_TX_SWING_FULL (1 << 25) // 7 bits 47 48 #define USB_R2_P30_PCS_TX_DEEMPH_3P5DB (1 << 20) // 6 bits 49 #define USB_R2_P30_PCS_TX_DEEMPH_6DB (1 << 26) // 6 bits 50 51 #define USB_R3_P30_SSC_EN (1 << 0) 52 #define USB_R3_P30_SSC_RANGE (1 << 1) // 3 bits 53 #define USB_R3_P30_SSC_REF_CLK_SEL (1 << 4) // 9 bits 54 #define USB_R3_P30_REF_SSP_EN (1 << 13) 55 56 #define USB_R4_P21_PORTRESET0 (1 << 0) 57 #define USB_R4_P21_SLEEPM0 (1 << 1) 58 #define USB_R4_MEM_PD (1 << 2) // 2 bits 59 #define USB_R4_P21_ONLY (1 << 4) 60 61 #define USB_R5_IDDIG_SYNC (1 << 0) 62 #define USB_R5_IDDIG_REG (1 << 1) 63 #define USB_R5_IDDIG_CFG (1 << 2) // 2 bits 64 #define USB_R5_IDDIG_EN0 (1 << 4) 65 #define USB_R5_IDDIG_EN1 (1 << 5) 66 #define USB_R5_IDDIG_CURR (1 << 6) 67 #define USB_R5_USB_IDDIG_IRQ (1 << 7) 68 #define USB_R5_IDDIG_TH (1 << 8) // 8 bits 69 #define USB_R5_IDDIG_CNT (1 << 16) // 8 bits 70