1 // Copyright 2017 The Fuchsia Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #pragma once
6 
7 #include <assert.h>
8 
9 #include <zircon/compiler.h>
10 #include <zircon/types.h>
11 
12 __BEGIN_CDECLS
13 
14 // clang-format off
15 typedef uint32_t zx_guest_trap_t;
16 
17 #define ZX_GUEST_TRAP_BELL ((zx_guest_trap_t) 0u)
18 #define ZX_GUEST_TRAP_MEM  ((zx_guest_trap_t) 1u)
19 #define ZX_GUEST_TRAP_IO   ((zx_guest_trap_t) 2u)
20 
21 typedef uint32_t zx_vcpu_t;
22 
23 #define ZX_VCPU_STATE ((zx_vcpu_t) 0u)
24 #define ZX_VCPU_IO    ((zx_vcpu_t) 1u)
25 // clang-format on
26 
27 // Structure to read and write VCPU state.
28 typedef struct zx_vcpu_state {
29 #if __aarch64__
30     uint64_t x[31];
31     uint64_t sp;
32     // Contains only the user-controllable upper 4-bits (NZCV).
33     uint32_t cpsr;
34 #elif __x86_64__
35     uint64_t rax;
36     uint64_t rcx;
37     uint64_t rdx;
38     uint64_t rbx;
39     uint64_t rsp;
40     uint64_t rbp;
41     uint64_t rsi;
42     uint64_t rdi;
43     uint64_t r8;
44     uint64_t r9;
45     uint64_t r10;
46     uint64_t r11;
47     uint64_t r12;
48     uint64_t r13;
49     uint64_t r14;
50     uint64_t r15;
51     // Contains only the user-controllable lower 32-bits.
52     uint64_t rflags;
53 #endif
54 } zx_vcpu_state_t;
55 
56 // Structure to read and write VCPU state for IO ports.
57 typedef struct zx_vcpu_io {
58     uint8_t access_size;
59     union {
60         uint8_t u8;
61         uint16_t u16;
62         uint32_t u32;
63         uint8_t data[4];
64     };
65 } zx_vcpu_io_t;
66 
67 __END_CDECLS
68