Home
last modified time | relevance | path

Searched refs:addr (Results 1 – 25 of 60) sorted by relevance

123

/kernel/include/
A Dreg.h13 #define REG64(addr) ((volatile uint64_t *)(uintptr_t)(addr)) argument
14 #define REG32(addr) ((volatile uint32_t *)(uintptr_t)(addr)) argument
15 #define REG16(addr) ((volatile uint16_t *)(uintptr_t)(addr)) argument
16 #define REG8(addr) ((volatile uint8_t *)(uintptr_t)(addr)) argument
18 #define RMWREG64(addr, startbit, width, val) *REG64(addr) = (*REG64(addr) & ~(((1<<(width)) - 1) <<… argument
19 #define RMWREG32(addr, startbit, width, val) *REG32(addr) = (*REG32(addr) & ~(((1<<(width)) - 1) <<… argument
20 #define RMWREG16(addr, startbit, width, val) *REG16(addr) = (*REG16(addr) & ~(((1<<(width)) - 1) <<… argument
21 #define RMWREG8(addr, startbit, width, val) *REG8(addr) = (*REG8(addr) & ~(((1<<(width)) - 1) << (s… argument
/kernel/dev/pcie/
A Dpci_config.cpp69 uint8_t Read(const PciReg8 addr) const override;
70 uint16_t Read(const PciReg16 addr) const override;
71 uint32_t Read(const PciReg32 addr) const override;
80 uint8_t PciPioConfig::Read(const PciReg8 addr) const { in Read()
86 uint16_t PciPioConfig::Read(const PciReg16 addr) const { in Read()
92 uint32_t PciPioConfig::Read(const PciReg32 addr) const { in Read()
115 uint8_t Read(const PciReg8 addr) const override;
116 uint16_t Read(const PciReg16 addr) const override;
117 uint32_t Read(const PciReg32 addr) const override;
127 uint8_t PciMmioConfig::Read(const PciReg8 addr) const { in Read()
[all …]
/kernel/vm/include/vm/
A Dphysmap.h32 static inline bool is_physmap_addr(const void* addr) { in is_physmap_addr() argument
33 return ((uintptr_t)addr >= PHYSMAP_BASE && in is_physmap_addr()
34 (uintptr_t)addr - PHYSMAP_BASE < PHYSMAP_SIZE); in is_physmap_addr()
53 static inline paddr_t physmap_to_paddr(const void* addr) { in physmap_to_paddr() argument
54 DEBUG_ASSERT_MSG(is_physmap_addr(addr), "vaddr %p\n", addr); in physmap_to_paddr()
56 return (uintptr_t)addr - PHYSMAP_BASE + PHYSMAP_BASE_PHYS; in physmap_to_paddr()
/kernel/lib/fbl/include/fbl/
A Darena.h35 void Free(void* addr);
36 bool in_range(uintptr_t addr) const { in in_range() argument
37 return data_.InRange(addr); in in_range()
39 bool in_range(void* addr) const { in in_range() argument
40 return in_range(reinterpret_cast<uintptr_t>(addr)); in in_range()
88 bool InRange(uintptr_t addr) const { in InRange() argument
90 addr < reinterpret_cast<uintptr_t>(top_)); in InRange()
92 bool InRange(const void* addr) const { in InRange() argument
93 return InRange(reinterpret_cast<uintptr_t>(addr)); in InRange()
147 void* addr = arena_.Alloc(); in New() local
[all …]
/kernel/platform/pc/
A Dacpi.cpp109 uintptr_t addr; in platform_enumerate_cpus() local
111 for (addr = records_start; addr < records_end; addr += record_hdr->Length) { in platform_enumerate_cpus()
128 if (addr != records_end) { in platform_enumerate_cpus()
163 uintptr_t addr; in platform_enumerate_io_apics() local
164 for (addr = records_start; addr < records_end;) { in platform_enumerate_io_apics()
179 addr += record_hdr->Length; in platform_enumerate_io_apics()
181 if (addr != records_end) { in platform_enumerate_io_apics()
215 uintptr_t addr; in platform_enumerate_interrupt_source_overrides() local
216 for (addr = records_start; addr < records_end;) { in platform_enumerate_interrupt_source_overrides()
265 addr += record_hdr->Length; in platform_enumerate_interrupt_source_overrides()
[all …]
/kernel/arch/x86/
A Dimage.S89 #define FIXUP_LOCATION(addr) (addr - KERNEL_BASE)(%rdi) argument
98 .macro fixup addr, n, stride
101 add %rax, FIXUP_LOCATION(\addr)
104 add %rax, FIXUP_LOCATION(\addr)
105 add %rax, FIXUP_LOCATION(\addr + \stride)
109 lea FIXUP_LOCATION(\addr), %rdx
/kernel/lib/pci/
A Dpio.cpp32 zx_status_t PioCfgRead(uint32_t addr, uint32_t* val, size_t width) { in PioCfgRead() argument
35 size_t shift = (addr & 0x3) * 8u; in PioCfgRead()
40 outpd(kPciConfigAddr, (addr & ~0x3) | kPciCfgEnable);; in PioCfgRead()
54 zx_status_t PioCfgWrite(uint32_t addr, uint32_t val, size_t width) { in PioCfgWrite() argument
57 size_t shift = (addr & 0x3) * 8u; in PioCfgWrite()
64 outpd(kPciConfigAddr, (addr & ~0x3) | kPciCfgEnable); in PioCfgWrite()
81 zx_status_t PioCfgRead(uint32_t addr, uint32_t* val, size_t width) {
90 zx_status_t PioCfgWrite(uint32_t addr, uint32_t val, size_t width) {
/kernel/lib/hypervisor/
A Dtrap_map.cpp45 Trap::Trap(uint32_t kind, zx_gpaddr_t addr, size_t len, fbl::RefPtr<PortDispatcher> port, in Trap() argument
47 : kind_(kind), addr_(addr), len_(len), port_(ktl::move(port)), key_(key) { in Trap()
81 zx_status_t TrapMap::InsertTrap(uint32_t kind, zx_gpaddr_t addr, size_t len, in InsertTrap() argument
87 auto iter = traps->find(addr); in InsertTrap()
90 "(addr %#lx len %lu key %lu)\n", kind, addr, len, key, iter->addr(), iter->len(), in InsertTrap()
95 ktl::unique_ptr<Trap> range(new (&ac) Trap(kind, addr, len, ktl::move(port), key)); in InsertTrap()
110 zx_status_t TrapMap::FindTrap(uint32_t kind, zx_gpaddr_t addr, Trap** trap) { in FindTrap() argument
118 iter = traps->upper_bound(addr); in FindTrap()
121 if (!iter.IsValid() || !iter->Contains(addr)) { in FindTrap()
/kernel/object/
A Dhandle.cpp68 uint32_t Handle::GetNewBaseValue(void* addr) TA_REQ(ArenaLock::Get()) { in GetNewBaseValue() argument
74 uint32_t v = *reinterpret_cast<uint32_t*>(addr); in GetNewBaseValue()
94 void* addr = arena_.Alloc(); in Alloc() local
96 if (likely(addr)) { in Alloc()
105 *base_value = GetNewBaseValue(addr); in Alloc()
106 return addr; in Alloc()
118 void* addr = Alloc(dispatcher, "new", &base_value); in Make() local
119 if (unlikely(!addr)) in Make()
124 return HandleOwner(new (addr) Handle(ktl::move(dispatcher), in Make()
140 if (unlikely(!addr)) in Dup()
[all …]
A Dpinned_memory_token_dispatcher.cpp146 dev_vaddr_t addr = mapped_addrs_[i]; in UnmapFromIommuLocked() local
147 if (addr == UINT64_MAX) { in UnmapFromIommuLocked()
155 zx_status_t err = iommu->Unmap(bus_txn_id, addr, size); in UnmapFromIommuLocked()
258 for (dev_vaddr_t addr = extent_base; in EncodeAddrs() local
259 addr < extent_base + min_contig && next_idx < num_pages; in EncodeAddrs()
260 addr += PAGE_SIZE, ++next_idx) { in EncodeAddrs()
261 mapped_addrs[next_idx] = addr; in EncodeAddrs()
A Dguest_dispatcher.cpp47 zx_status_t GuestDispatcher::SetTrap(uint32_t kind, zx_vaddr_t addr, size_t len, in SetTrap() argument
50 return guest_->SetTrap(kind, addr, len, ktl::move(port), key); in SetTrap()
/kernel/lib/libc/string/
A Dmemscan.c11 void *memscan(void *addr, int c, size_t size) in memscan() argument
13 unsigned char *p = (unsigned char *)addr; in memscan()
/kernel/arch/x86/hypervisor/
A Dguest.cpp93 zx_status_t Guest::SetTrap(uint32_t kind, zx_vaddr_t addr, size_t len, in SetTrap() argument
97 } else if (SIZE_MAX - len < addr) { in SetTrap()
115 } else if (addr + len > UINT16_MAX) { in SetTrap()
118 return traps_.InsertTrap(kind, addr, len, ktl::move(port), key); in SetTrap()
124 if (!IS_PAGE_ALIGNED(addr) || !IS_PAGE_ALIGNED(len)) { in SetTrap()
127 zx_status_t status = gpas_->UnmapRange(addr, len); in SetTrap()
131 return traps_.InsertTrap(kind, addr, len, ktl::move(port), key); in SetTrap()
/kernel/arch/arm64/
A Dboot-mmu.cpp29 static size_t vaddr_to_l0_index(uintptr_t addr) { in vaddr_to_l0_index() argument
30 return (addr >> MMU_KERNEL_TOP_SHIFT) & (MMU_KERNEL_PAGE_TABLE_ENTRIES_TOP - 1); in vaddr_to_l0_index()
33 static size_t vaddr_to_l1_index(uintptr_t addr) { in vaddr_to_l1_index() argument
34 return (addr >> MMU_LX_X(MMU_KERNEL_PAGE_SIZE_SHIFT, 1)) & (MMU_KERNEL_PAGE_TABLE_ENTRIES - 1); in vaddr_to_l1_index()
37 static size_t vaddr_to_l2_index(uintptr_t addr) { in vaddr_to_l2_index() argument
38 return (addr >> MMU_LX_X(MMU_KERNEL_PAGE_SIZE_SHIFT, 2)) & (MMU_KERNEL_PAGE_TABLE_ENTRIES - 1); in vaddr_to_l2_index()
41 static size_t vaddr_to_l3_index(uintptr_t addr) { in vaddr_to_l3_index() argument
42 return (addr >> MMU_LX_X(MMU_KERNEL_PAGE_SIZE_SHIFT, 3)) & (MMU_KERNEL_PAGE_TABLE_ENTRIES - 1); in vaddr_to_l3_index()
A Dimage.S68 #define FIXUP_LOCATION(addr) (addr - KERNEL_BASE + IMAGE_LOAD_START) argument
78 .macro fixup addr, n, stride
79 adr x9, FIXUP_LOCATION(\addr)
/kernel/dev/hdcp/amlogic_s912/
A Dhdcp.cpp59 static void hdmitx_writereg(uint32_t addr, uint32_t data) { in hdmitx_writereg() argument
61 uint32_t offset = (addr & DWC_OFFSET_MASK) >> 24; in hdmitx_writereg()
62 addr = addr & 0xffff; in hdmitx_writereg()
63 WRITE32_HDMITX_REG(HDMITX_ADDR_PORT + offset, addr); in hdmitx_writereg()
64 WRITE32_HDMITX_REG(HDMITX_ADDR_PORT + offset, addr); // FIXME: Need to write twice! in hdmitx_writereg()
/kernel/arch/arm64/hypervisor/
A Dguest.cpp74 zx_status_t Guest::SetTrap(uint32_t kind, zx_gpaddr_t addr, size_t len, in SetTrap() argument
93 if (SIZE_MAX - len < addr) { in SetTrap()
95 } else if (!IS_PAGE_ALIGNED(addr) || !IS_PAGE_ALIGNED(len) || len == 0) { in SetTrap()
98 zx_status_t status = gpas_->UnmapRange(addr, len); in SetTrap()
102 return traps_.InsertTrap(kind, addr, len, ktl::move(port), key); in SetTrap()
/kernel/dev/pcie/address_provider/
A Dpio.cpp19 fbl::RefPtr<PciConfig> PioPcieAddressProvider::CreateConfig(const uintptr_t addr) { in CreateConfig() argument
20 return PciConfig::Create(addr, PciAddrSpace::PIO); in CreateConfig()
/kernel/dev/pcie/include/dev/address_provider/
A Daddress_provider.h35 virtual fbl::RefPtr<PciConfig> CreateConfig(const uintptr_t addr) = 0;
51 fbl::RefPtr<PciConfig> CreateConfig(const uintptr_t addr) override;
67 fbl::RefPtr<PciConfig> CreateConfig(const uintptr_t addr) override;
81 fbl::RefPtr<PciConfig> CreateConfig(const uintptr_t addr) override;
/kernel/vm/
A Dvmm.cpp43 zx_status_t vmm_page_fault_handler(vaddr_t addr, uint flags) { in vmm_page_fault_handler() argument
50 TRACEF("thread %s va %#" PRIxPTR ", flags 0x%x\n", current_thread->name, addr, flags); in vmm_page_fault_handler()
53 ktrace(TAG_PAGE_FAULT, (uint32_t)(addr >> 32), (uint32_t)addr, flags, arch_curr_cpu_num()); in vmm_page_fault_handler()
56 VmAspace* aspace = VmAspace::vaddr_to_aspace(addr); in vmm_page_fault_handler()
62 zx_status_t status = aspace->PageFault(addr, flags); in vmm_page_fault_handler()
73 ktrace(TAG_PAGE_FAULT_EXIT, (uint32_t)(addr >> 32), (uint32_t)addr, flags, arch_curr_cpu_num()); in vmm_page_fault_handler()
A Dpmm_node.h29 vm_page_t* PaddrToPage(paddr_t addr) TA_NO_THREAD_SAFETY_ANALYSIS;
88 inline vm_page_t* PmmNode::PaddrToPage(paddr_t addr) TA_NO_THREAD_SAFETY_ANALYSIS { in PaddrToPage() argument
90 if (a.address_in_arena(addr)) { in PaddrToPage()
91 size_t index = (addr - a.base()) / PAGE_SIZE; in PaddrToPage()
/kernel/lib/hypervisor/include/hypervisor/
A Dtrap_map.h37 Trap(uint32_t kind, zx_gpaddr_t addr, size_t len, fbl::RefPtr<PortDispatcher> port,
49 zx_gpaddr_t addr() const { return addr_; } in addr() function
65 zx_status_t InsertTrap(uint32_t kind, zx_gpaddr_t addr, size_t len,
67 zx_status_t FindTrap(uint32_t kind, zx_gpaddr_t addr, Trap** trap);
/kernel/dev/pcie/include/dev/
A Dpci_config.h127 virtual uint8_t Read(const PciReg8 addr) const = 0;
128 virtual uint16_t Read(const PciReg16 addr) const = 0;
129 virtual uint32_t Read(const PciReg32 addr) const = 0;
130 virtual void Write(const PciReg8 addr, uint8_t val) const = 0;
131 virtual void Write(const PciReg16 addr, uint16_t val) const = 0;
132 virtual void Write(const PciReg32 addr, uint32_t val) const = 0;
/kernel/lib/pci/include/lib/pci/
A Dpio.h26 zx_status_t PioCfgRead(uint32_t addr, uint32_t* val, size_t width);
31 zx_status_t PioCfgWrite(uint32_t addr, uint32_t val, size_t width);
/kernel/syscalls/
A Dvmar.cpp200 zx_status_t sys_vmar_unmap(zx_handle_t handle, zx_vaddr_t addr, uint64_t len) { in sys_vmar_unmap() argument
209 return vmar->Unmap(addr, len); in sys_vmar_unmap()
213 zx_status_t sys_vmar_protect(zx_handle_t handle, zx_vm_option_t options, zx_vaddr_t addr, uint64_t … in sys_vmar_protect() argument
233 return vmar->Protect(addr, len, options); in sys_vmar_protect()
237 zx_status_t sys_vmar_protect_old(zx_handle_t vmar_handle, zx_vaddr_t addr, uint64_t len, uint32_t p… in sys_vmar_protect_old() argument
238 return sys_vmar_protect(vmar_handle, prot, addr, len); in sys_vmar_protect_old()

Completed in 50 milliseconds

123