Searched refs:device (Results 1 – 14 of 14) sorted by relevance
| /kernel/target/arm64/dtb/ |
| A D | update-device-tree.sh | 1 dtc -I dts -o dummy-device-tree.dtb -O dtb dummy-device-tree.dts
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| A D | dummy-device-tree.dts | 3 // This is a dummy Linux device tree, just needed to make some bootloaders
4 // that expect a device tree happy.
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| /kernel/object/ |
| A D | pci_interrupt_dispatcher.cpp | 31 const fbl::RefPtr<PcieDevice>& device, in Create() argument
37 if (!device || !out_rights || !out_interrupt) { in Create()
46 auto interrupt_dispatcher = new (&ac) PciInterruptDispatcher(device, irq_id, maskable); in Create()
64 device->UnmaskIrq(irq_id); in Create()
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| A D | pci_device_dispatcher.cpp | 31 auto device = bus_drv->GetNthDevice(index); in Create() local
32 if (device == nullptr) in Create()
36 auto disp = new (&ac) PciDeviceDispatcher(ktl::move(device), out_info); in Create()
45 PciDeviceDispatcher::PciDeviceDispatcher(fbl::RefPtr<PcieDevice> device, in PciDeviceDispatcher() argument
47 : device_(device) { in PciDeviceDispatcher()
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| /kernel/object/include/object/ |
| A D | pci_interrupt_dispatcher.h | 19 static zx_status_t Create(const fbl::RefPtr<PcieDevice>& device,
36 PciInterruptDispatcher(const fbl::RefPtr<PcieDevice>& device, uint32_t vector, bool maskable) in PciInterruptDispatcher() argument
37 : device_(device), vector_(vector), maskable_(maskable) { } in PciInterruptDispatcher()
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| A D | pci_device_dispatcher.h | 40 const fbl::RefPtr<PcieDevice>& device() { return device_; } in device() function
61 PciDeviceDispatcher(fbl::RefPtr<PcieDevice> device,
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| /kernel/dev/pcie/ |
| A D | pcie_upstream_node.cpp | 44 auto device = GetDownstream(i); in AllocateDownstreamBars() local
45 if (device != nullptr) { in AllocateDownstreamBars()
46 zx_status_t res = device->AllocateBars(); in AllocateDownstreamBars()
48 device->Disable(); in AllocateDownstreamBars()
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| A D | pcie_caps.cpp | 99 device.caps_ = PciReg32(static_cast<uint16_t>(base_ + kCapsOffset(kDeviceOffset))); in PciCapPcie()
100 device.ctrl_ = PciReg16(static_cast<uint16_t>(base_ + kControlOffset(kDeviceOffset))); in PciCapPcie()
101 device.status_ = PciReg16(static_cast<uint16_t>(base_ + kStatusOffset(kDeviceOffset))); in PciCapPcie()
180 uint32_t devcaps = cfg->Read(device.caps()); in PciCapPcie()
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| A D | pcie_device.cpp | 237 return thiz->cfg_->Read(thiz->pcie_->device.status()) & in DoFunctionLevelReset()
242 auto val = static_cast<uint16_t>(thiz->cfg_->Read(thiz->pcie_->device.ctrl()) | in DoFunctionLevelReset()
244 thiz->cfg_->Write(thiz->pcie_->device.ctrl(), val); in DoFunctionLevelReset()
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| /kernel/dev/iommu/intel/ |
| A D | device_context.h | 31 ktl::unique_ptr<DeviceContext>* device);
34 ktl::unique_ptr<DeviceContext>* device);
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| A D | device_context.cpp | 96 ktl::unique_ptr<DeviceContext>* device) { in Create() argument
125 *device = ktl::move(dev); in Create()
131 ktl::unique_ptr<DeviceContext>* device) { in Create() argument
174 *device = ktl::move(dev); in Create()
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| /kernel/syscalls/ |
| A D | ddk_pci.cpp | 474 auto device = pci_device->device(); in sys_pci_config_read() local
475 auto cfg_size = device->is_pcie() ? PCIE_EXTENDED_CONFIG_SIZE : PCIE_BASE_CONFIG_SIZE; in sys_pci_config_read()
483 auto config = device->config(); in sys_pci_config_read()
511 auto device = pci_device->device(); in sys_pci_config_write() local
512 auto cfg_size = device->is_pcie() ? PCIE_EXTENDED_CONFIG_SIZE : PCIE_BASE_CONFIG_SIZE; in sys_pci_config_write()
517 auto config = device->config(); in sys_pci_config_write()
648 auto dev = pci_device->device(); in sys_pci_get_bar()
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| /kernel/dev/pcie/include/dev/ |
| A D | pcie_bus_driver.h | 54 using QuirkHandler = void (*)(const fbl::RefPtr<PcieDevice>& device);
197 static void RunQuirks(const fbl::RefPtr<PcieDevice>& device);
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| A D | pcie_caps.h | 65 #define PCS_CAPS_MIN_SIZE ((uint)offsetof(pcie_capabilities_t, device))
316 PcieCapChunk device; variable
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