Searched refs:HDMITX_DWC_I2CM_SCDC_UPDATE1 (Results 1 – 2 of 2) sorted by relevance
635 #define HDMITX_DWC_I2CM_SCDC_UPDATE1 (DWC_OFFSET_MASK + 0x7E31) macro
910 for (reg_adr = HDMITX_DWC_DESIGN_ID; reg_adr < HDMITX_DWC_I2CM_SCDC_UPDATE1 + 1; reg_adr ++) { in dump_regs()
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