Searched refs:HHI_GP0_PLL_CNTL2 (Results 1 – 3 of 3) sorted by relevance
90 #define HHI_GP0_PLL_CNTL2 (0x12 << 2) macro
57 hiu_clk_set_reg(device, HHI_GP0_PLL_CNTL2, G12A_GP0_PLL_CNTL2); in s905d2_pll_init_regs()
125 #define HHI_GP0_PLL_CNTL2 (0x11 << 2) macro
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