Home
last modified time | relevance | path

Searched refs:REG_RD (Results 1 – 11 of 11) sorted by relevance

/system/dev/audio/intel-hda/controller/
A Ddebug.cpp46 out_regs.gcap = REG_RD(&regs()->gcap); in SnapshotRegs()
47 out_regs.vmin = REG_RD(&regs()->vmin); in SnapshotRegs()
48 out_regs.vmaj = REG_RD(&regs()->vmaj); in SnapshotRegs()
81 uint16_t gcap = REG_RD(&regs()->gcap); in SnapshotRegs()
91 sout.lpib = REG_RD(&sin.lpib); in SnapshotRegs()
92 sout.cbl = REG_RD(&sin.cbl); in SnapshotRegs()
93 sout.lvi = REG_RD(&sin.lvi); in SnapshotRegs()
94 sout.fifod = REG_RD(&sin.fifod); in SnapshotRegs()
95 sout.fmt = REG_RD(&sin.fmt); in SnapshotRegs()
96 sout.bdpl = REG_RD(&sin.bdpl); in SnapshotRegs()
[all …]
A Dintel-hda-irq.cpp38 uint8_t rirbsts = REG_RD(&regs()->rirbsts); in SnapshotRIRB()
40 unsigned int rirb_wr_ptr = REG_RD(&regs()->rirbwp) & rirb_mask_; in SnapshotRIRB()
230 uint8_t corbsts = REG_RD(&regs()->corbsts); in ProcessCORB()
273 ZX_DEBUG_ASSERT(corb_wr_ptr_ == REG_RD(&regs()->corbwp)); in ComputeCORBSpaceLocked()
275 unsigned int corb_rd_ptr = REG_RD(&regs()->corbrp) & corb_mask_; in ComputeCORBSpaceLocked()
310 uint16_t statests = REG_RD(&regs()->statests) & HDA_REG_STATESTS_MASK; in ProcessControllerIRQ()
353 uint32_t intsts = REG_RD(&regs()->intsts); in HandleIrq()
A Dintel-hda-controller-init.cpp40 if (REG_RD(&regs()->gctl) & HDA_REG_GCTL_HWINIT) { in ResetControllerHW()
47 uint16_t gcap = REG_RD(&regs()->gcap); in ResetControllerHW()
77 return (REG_RD(&regs()->gctl) & HDA_REG_GCTL_HWINIT) == 0; in ResetControllerHW()
95 return (REG_RD(&regs()->gctl) & HDA_REG_GCTL_HWINIT) != 0; in ResetControllerHW()
295 gcap = REG_RD(&regs()->gcap); in SetupStreamDescriptors()
338 uint8_t tmp = REG_RD(size_reg); in SetupCommandBufferSize()
445 bool gcap_64bit_ok = HDA_REG_GCAP_64OK(REG_RD(&regs()->gcap)); in SetupCommandBuffer()
509 uint32_t offset = REG_RD(&regs()->llch); in ProbeAudioDSP()
523 cap = REG_RD(&pp_regs->ppch); in ProbeAudioDSP()
590 major = REG_RD(&regs()->vmaj); in InitInternal()
[all …]
A Dintel-hda-stream.cpp132 if (REG_RD(&regs->ctl_sts.w) & HDA_SD_REG_CTRL_RUN) { in Reset()
145 auto val = REG_RD(&regs->ctl_sts.w); in Reset()
164 auto val = REG_RD(&regs->ctl_sts.w); in Reset()
227 fifo_depth_ = REG_RD(&regs_->fifod); in SetStreamFormat()
330 uint8_t sts = REG_RD(&regs_->ctl_sts.b.sts); in ProcessStreamIRQ()
355 msg.ring_buffer_pos = REG_RD(&regs_->lpib); in ProcessStreamIRQ()
A Dintel-hda-controller.cpp287 resp.ihda_vmaj = REG_RD(&regs()->vmaj); in ProcessClientRequest()
288 resp.ihda_vmin = REG_RD(&regs()->vmin); in ProcessClientRequest()
A Dintel-hda-dsp.cpp173 uint32_t ppsts = REG_RD(&pp_regs()->ppsts); in ProcessIRQ()
/system/dev/audio/intel-hda/dsp/
A Ddebug.cpp10 LOG(INFO, "ADSPCS 0x%08x\n", REG_RD(&regs()->adspcs)); in DumpRegs()
11 LOG(INFO, "ADSPIC 0x%08x\n", REG_RD(&regs()->adspic)); in DumpRegs()
12 LOG(INFO, "ADSPIS 0x%08x\n", REG_RD(&regs()->adspis)); in DumpRegs()
13 LOG(INFO, "ADSPIC2 0x%08x\n", REG_RD(&regs()->adspic2)); in DumpRegs()
14 LOG(INFO, "ADSPIS2 0x%08x\n", REG_RD(&regs()->adspis2)); in DumpRegs()
15 LOG(INFO, "HIPCT 0x%08x\n", REG_RD(&regs()->hipct)); in DumpRegs()
16 LOG(INFO, "HIPCTE 0x%08x\n", REG_RD(&regs()->hipcte)); in DumpRegs()
17 LOG(INFO, "HIPCI 0x%08x\n", REG_RD(&regs()->hipci)); in DumpRegs()
18 LOG(INFO, "HIPCIE 0x%08x\n", REG_RD(&regs()->hipcie)); in DumpRegs()
19 LOG(INFO, "HIPCCTL 0x%08x\n", REG_RD(&regs()->hipcctl)); in DumpRegs()
[all …]
A Dintel-dsp-code-loader.cpp27 LOG(INFO, "CTL_STS=0x%08x\n", REG_RD(&regs_->stream.ctl_sts.w)); in DumpRegisters()
28 LOG(INFO, " LPIB=0x%08x\n", REG_RD(&regs_->stream.lpib)); in DumpRegisters()
29 LOG(INFO, " CBL=0x%08x\n", REG_RD(&regs_->stream.cbl)); in DumpRegisters()
30 LOG(INFO, " LVI=0x%04x\n", REG_RD(&regs_->stream.lvi)); in DumpRegisters()
31 LOG(INFO, " FIFOD=0x%04x\n", REG_RD(&regs_->stream.fifod)); in DumpRegisters()
32 LOG(INFO, " FMT=0x%04x\n", REG_RD(&regs_->stream.fmt)); in DumpRegisters()
33 LOG(INFO, " BDPL=0x%08x\n", REG_RD(&regs_->stream.bdpl)); in DumpRegisters()
34 LOG(INFO, " BDPU=0x%08x\n", REG_RD(&regs_->stream.bdpu)); in DumpRegisters()
35 LOG(INFO, " SPBFCH=0x%08x\n", REG_RD(&regs_->spbfch)); in DumpRegisters()
36 LOG(INFO, "SPBFCTL=0x%08x\n", REG_RD(&regs_->spbfctl)); in DumpRegisters()
[all …]
A Dintel-audio-dsp.cpp556 return ((REG_RD(&fw_regs()->fw_status) & in LoadFirmware()
562 st, REG_RD(&fw_regs()->fw_status)); in LoadFirmware()
575 st, REG_RD(&fw_regs()->fw_status)); in LoadFirmware()
592 uint32_t val = REG_RD(&regs()->adspcs); in IsCoreEnabled()
611 return (REG_RD(&regs()->adspcs) & in ResetCore()
621 return (REG_RD(&regs()->adspcs) & in UnResetCore()
631 return (REG_RD(&regs()->adspcs) & in PowerDownCore()
655 uint32_t adspis = REG_RD(&regs()->adspis); in ProcessIrq()
658 uint32_t w = REG_RD(&regs()->cldma.stream.ctl_sts.w); in ProcessIrq()
662 IpcMessage message(REG_RD(&regs()->hipct), REG_RD(&regs()->hipcte)); in ProcessIrq()
[all …]
/system/ulib/intel-hda/include/intel-hda/utils/
A Dintel-hda-registers.h357 static inline T REG_RD(const T* reg) { in REG_RD() function
370 REG_WR(reg, static_cast<T>((REG_RD(reg) & ~clr_bits) | set_bits)); in REG_MOD()
/system/uapp/ihda/
A Dintel_hda_controller.cpp180 uint16_t gcap = REG_RD(&regs.gcap); in DumpRegs()

Completed in 22 milliseconds