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Searched refs:_SIC_ (Results 1 – 4 of 4) sorted by relevance

/system/dev/codec/max98927/
A Dmax98927-registers.h71 #define _SIC_ static inline constexpr macro
75 _SIC_ uint8_t PCM_TX_CH_SRC_A_PCM_IVADC_V_DEST(unsigned ch) { return ch & 0xF; } in PCM_TX_CH_SRC_A_PCM_IVADC_V_DEST()
81 _SIC_ uint8_t PCM_SAMPLE_RATE_SETUP_1_DIG_IF_SR(uint8_t val) { return val & 0xF; } in PCM_SAMPLE_RATE_SETUP_1_DIG_IF_SR()
85 _SIC_ uint8_t PCM_SAMPLE_RATE_SETUP_2_IVADC_SR(uint8_t val) { return val & 0xF; } in PCM_SAMPLE_RATE_SETUP_2_IVADC_SR()
91 _SIC_ uint8_t PCM_SPK_MONOMIX_B_CFG_CH0_SRC(uint8_t ch) { return ch; } in PCM_SPK_MONOMIX_B_CFG_CH0_SRC()
94 _SIC_ uint8_t PCM_SPK_MONOMIX_B_CFG_CH1_SRC(uint8_t ch) { return ch; } in PCM_SPK_MONOMIX_B_CFG_CH1_SRC()
125 _SIC_ uint8_t SPK_GAIN_PDM(uint8_t val) { return (uint8_t)(val << 4); } in SPK_GAIN_PDM()
126 _SIC_ uint8_t SPK_GAIN_PCM(uint8_t val) { return val; } in SPK_GAIN_PCM()
136 _SIC_ uint8_t MEAS_DSP_CFG_I_DCBLK(uint8_t val) { return (uint8_t)(val << 6); } in MEAS_DSP_CFG_I_DCBLK()
137 _SIC_ uint8_t MEAS_DSP_CFG_V_DCBLK(uint8_t val) { return (uint8_t)(val << 4); } in MEAS_DSP_CFG_V_DCBLK()
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/system/ulib/intel-hda/include/intel-hda/utils/
A Dintel-hda-registers.h188 #define _SIC_ static inline constexpr macro
190 _SIC_ bool HDA_REG_GCAP_64OK(uint16_t val) { return (val & 1u) != 0; } in HDA_REG_GCAP_64OK()
191 _SIC_ uint16_t HDA_REG_GCAP_NSDO(uint16_t val) { return (val >> 1) & 0x03; } in HDA_REG_GCAP_NSDO()
192 _SIC_ uint16_t HDA_REG_GCAP_BSS (uint16_t val) { return (val >> 3) & 0x1F; } in HDA_REG_GCAP_BSS()
193 _SIC_ uint16_t HDA_REG_GCAP_ISS (uint16_t val) { return (val >> 8) & 0x0F; } in HDA_REG_GCAP_ISS()
194 _SIC_ uint16_t HDA_REG_GCAP_OSS (uint16_t val) { return (val >> 12) & 0x0F; } in HDA_REG_GCAP_OSS()
260 _SIC_ uint32_t HDA_SD_REG_CTRL_STRM_TAG(uint8_t tag) { // Stream Tag in HDA_SD_REG_CTRL_STRM_TAG()
297 _SIC_ uint32_t ADSP_REG_ADSPCS_CRST (uint32_t core_mask) { return (core_mask & 0xFF); } in ADSP_REG_ADSPCS_CRST()
298 _SIC_ uint32_t ADSP_REG_ADSPCS_CSTALL(uint32_t core_mask) { return (core_mask & 0xFF) << 8; } in ADSP_REG_ADSPCS_CSTALL()
299 _SIC_ uint32_t ADSP_REG_ADSPCS_SPA (uint32_t core_mask) { return (core_mask & 0xFF) << 16; } in ADSP_REG_ADSPCS_SPA()
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A Dintel-audio-dsp-ipc.h355 #define _SIC_ static inline constexpr macro
357 _SIC_ uint32_t IPC_PRI(MsgTarget msg_tgt, MsgDir rsp, ModuleMsgType type, in IPC_PRI()
368 _SIC_ uint32_t IPC_INIT_INSTANCE_EXT(ProcDomain proc_domain, uint8_t core_id, in IPC_INIT_INSTANCE_EXT()
378 _SIC_ uint32_t IPC_LARGE_CONFIG_EXT(bool init_block, bool final_block, in IPC_LARGE_CONFIG_EXT()
398 _SIC_ uint32_t IPC_CREATE_PIPELINE_PRI(uint8_t instance_id, in IPC_CREATE_PIPELINE_PRI()
408 _SIC_ uint32_t IPC_CREATE_PIPELINE_EXT(bool lp) { return (lp ? 1 : 0); } in IPC_CREATE_PIPELINE_EXT()
412 _SIC_ uint32_t IPC_SET_PIPELINE_STATE_PRI(uint8_t ppl_id, PipelineState state) { in IPC_SET_PIPELINE_STATE_PRI()
425 #undef _SIC_
573 #define _SIC_ static inline constexpr macro
575 _SIC_ uint32_t HDA_GATEWAY_CFG_NODE_ID(uint8_t dma_type, uint8_t dma_id) { in HDA_GATEWAY_CFG_NODE_ID()
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/system/dev/audio/intel-hda/controller/
A Dutils.h33 #define _SIC_ static inline constexpr macro
34 template <typename T> _SIC_ T OR(T x, T y) { return static_cast<T>(x | y); } in OR()
35 template <typename T> _SIC_ T AND(T x, T y) { return static_cast<T>(x & y); } in AND()
36 #undef _SIC_

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