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Searched refs:ctl_sts (Results 1 – 7 of 7) sorted by relevance

/system/dev/audio/intel-hda/dsp/
A Dintel-dsp-code-loader.cpp27 LOG(INFO, "CTL_STS=0x%08x\n", REG_RD(&regs_->stream.ctl_sts.w)); in DumpRegisters()
127 REG_WR(&regs_->stream.ctl_sts.w, ctl_val); in TransferFirmware()
144 REG_SET_BITS(&regs_->stream.ctl_sts.w, SET); in TransferFirmware()
151 REG_CLR_BITS(&regs_->stream.ctl_sts.w, HDA_SD_REG_CTRL_RUN); in StopTransfer()
A Dintel-audio-dsp.cpp658 uint32_t w = REG_RD(&regs()->cldma.stream.ctl_sts.w); in ProcessIrq()
659 REG_WR(&regs()->cldma.stream.ctl_sts.w, w); in ProcessIrq()
A Ddebug.cpp21 LOG(INFO, "CTL_STS 0x%08x\n", REG_RD(&regs()->cldma.stream.ctl_sts.w)); in DumpRegs()
/system/dev/audio/intel-hda/controller/
A Dintel-hda-stream.cpp115 REG_CLR_BITS(&regs->ctl_sts.w, HDA_SD_REG_CTRL_RUN); in EnsureStopped()
123 REG_MOD(&regs->ctl_sts.w, CLR, SET); in EnsureStopped()
132 if (REG_RD(&regs->ctl_sts.w) & HDA_SD_REG_CTRL_RUN) { in Reset()
145 auto val = REG_RD(&regs->ctl_sts.w); in Reset()
156 REG_WR(&regs->ctl_sts.w, 0u); in Reset()
164 auto val = REG_RD(&regs->ctl_sts.w); in Reset()
330 uint8_t sts = REG_RD(&regs_->ctl_sts.b.sts); in ProcessStreamIRQ()
331 REG_WR(&regs_->ctl_sts.b.sts, sts); in ProcessStreamIRQ()
344 REG_CLR_BITS(&regs_->ctl_sts.w, HDA_SD_REG_CTRL_RUN); in ProcessStreamIRQ()
645 REG_WR(&regs_->ctl_sts.w, ctl_val); in ProcessStartLocked()
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A Ddebug.cpp90 sout.ctl_sts.w = REG_RD(&sin.ctl_sts.w); in SnapshotRegs()
/system/uapp/ihda/
A Dintel_hda_controller.cpp61 { "CTL", ihda_dump_sdctl, offsetof(hda_stream_desc_regs_t, ctl_sts.w) }, in ihda_dump_stream_regs()
62 { "STS", ihda_dump8, offsetof(hda_stream_desc_regs_t, ctl_sts.b.sts) }, in ihda_dump_stream_regs()
/system/ulib/intel-hda/include/intel-hda/utils/
A Dintel-hda-registers.h44 } ctl_sts; member

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