Searched refs:regval (Results 1 – 6 of 6) sorted by relevance
| /system/dev/pci/amlogic-pcie/ |
| A D | aml-pcie.cpp | 27 uint32_t regval; in RmwCtrlSts() local
30 regval = 0; in RmwCtrlSts()
33 regval = 1; in RmwCtrlSts()
36 regval = 2; in RmwCtrlSts()
39 regval = 3; in RmwCtrlSts()
42 regval = 4; in RmwCtrlSts()
45 regval = 5; in RmwCtrlSts()
48 regval = 1; in RmwCtrlSts()
52 dbi_.SetBits32(regval << shift, PCIE_CTRL_STS_OFF); in RmwCtrlSts()
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| /system/dev/gpio/aml-gxl-gpio/ |
| A D | aml-gxl-gpio.cpp | 233 regval |= (1 << pin_index); in GpioImplConfigIn()
234 Write32GpioReg(block->mmio_index, block->oen_offset, regval); in GpioImplConfigIn()
257 regval |= (1 << (pin_index + block->output_write_shift)); in GpioImplConfigOut()
263 regval = Read32GpioReg(block->mmio_index, block->oen_offset); in GpioImplConfigOut()
264 regval &= ~(1 << pin_index); in GpioImplConfigOut()
265 Write32GpioReg(block->mmio_index, block->oen_offset, regval); in GpioImplConfigOut()
294 regval |= mask; in GpioImplSetAltFunction()
296 regval &= ~mask; in GpioImplSetAltFunction()
323 if (regval & readmask) { in GpioImplRead()
353 regval |= (1 << pin_index); in GpioImplWrite()
[all …]
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| /system/dev/gpio/aml-axg-gpio/ |
| A D | aml-axg-gpio.c | 138 regval |= pinmask; in aml_gpio_config_in()
139 WRITE32_GPIO_REG(block->mmio_index, block->oen_offset, regval); in aml_gpio_config_in()
165 regval |= pinmask; in aml_gpio_config_out()
167 regval &= ~pinmask; in aml_gpio_config_out()
171 regval = READ32_GPIO_REG(block->mmio_index, block->oen_offset); in aml_gpio_config_out()
172 regval &= ~pinmask; in aml_gpio_config_out()
173 WRITE32_GPIO_REG(block->mmio_index, block->oen_offset, regval); in aml_gpio_config_out()
214 regval |= fn_val; // Assign the new value to the mux in aml_gpio_set_alt_function()
241 if (regval & readmask) { in aml_gpio_read()
267 regval |= 1 << pinindex; in aml_gpio_write()
[all …]
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| /system/dev/audio/gauss-pdm-input/ |
| A D | a113-audio-device.c | 14 #define REGDUMPEEAUDIO(regval) \ argument
15 zxlogf(INFO, #regval " = 0x%08x\n", \
16 a113_ee_audio_read(audio_device, regval));
18 #define REGDUMPPDM(regval) \ argument
19 zxlogf(INFO, #regval " = 0x%08x\n", \
20 a113_ee_audio_read(audio_device, regval));
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| /system/dev/i2c/dw-i2c/ |
| A D | dw-i2c.c | 307 uint32_t regval; in i2c_dw_host_init() local
334 regval = 0; in i2c_dw_host_init()
335 regval = I2C_DW_SET_MASK(regval, DW_I2C_CON_SLAVE_DIS_START, in i2c_dw_host_init()
340 regval = I2C_DW_SET_MASK(regval, DW_I2C_CON_RESTART_EN_START, in i2c_dw_host_init()
345 regval = I2C_DW_SET_MASK(regval, DW_I2C_CON_10BITADDRSLAVE_START, in i2c_dw_host_init()
348 regval = I2C_DW_SET_MASK(regval, DW_I2C_CON_10BITADDRMASTER_START, in i2c_dw_host_init()
353 regval = I2C_DW_SET_MASK(regval, DW_I2C_CON_SPEED_START, in i2c_dw_host_init()
358 regval = I2C_DW_SET_MASK(regval, DW_I2C_CON_MASTER_MODE_START, in i2c_dw_host_init()
363 I2C_DW_WRITE32(DW_I2C_CON, regval); in i2c_dw_host_init()
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| /system/dev/display/vim-display/ |
| A D | hdmitx.cpp | 783 uint32_t regval = 0; in init_hdmi_interface() local
853 regval = (READ32_REG(VPU, VPU_HDMI_SETTING) & 0xf00) >> 8; in init_hdmi_interface()
860 SET_BIT32(VPU, VPU_HDMI_SETTING, regval, 4, 8); // why??? in init_hdmi_interface()
864 regval = hdmitx_readreg(display, HDMITX_DWC_FC_INVIDCONF); in init_hdmi_interface()
865 regval &= ~(1 << 3); // clear hdmi mode select in init_hdmi_interface()
866 hdmitx_writereg(display,HDMITX_DWC_FC_INVIDCONF, regval); in init_hdmi_interface()
868 regval = hdmitx_readreg(display, HDMITX_DWC_FC_INVIDCONF); in init_hdmi_interface()
869 regval |= (1 << 3); // clear hdmi mode select in init_hdmi_interface()
870 hdmitx_writereg(display,HDMITX_DWC_FC_INVIDCONF, regval); in init_hdmi_interface()
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Completed in 21 milliseconds