1 // Copyright 2016 The Fuchsia Authors
2 // Copyright (c) 2012-2015 Travis Geiselbrecht
3 //
4 // Use of this source code is governed by a MIT-style
5 // license that can be found in the LICENSE file or at
6 // https://opensource.org/licenses/MIT
7
8 #include <assert.h>
9 #include <dev/interrupt/arm_gic_common.h>
10 #include <dev/interrupt/arm_gic_hw_interface.h>
11 #include <err.h>
12 #include <zircon/types.h>
13
14 static const struct arm_gic_hw_interface_ops* gic_ops = nullptr;
15
16 /* Registers the ops of the GIC driver initialized with HW interface layer */
arm_gic_hw_interface_register(const struct arm_gic_hw_interface_ops * ops)17 void arm_gic_hw_interface_register(const struct arm_gic_hw_interface_ops* ops) {
18 DEBUG_ASSERT(ops != nullptr);
19 gic_ops = ops;
20 }
21
arm_gic_is_registered()22 bool arm_gic_is_registered() {
23 return gic_ops == nullptr ? false : true;
24 }
25
gic_write_gich_hcr(uint32_t val)26 void gic_write_gich_hcr(uint32_t val) {
27 return gic_ops->write_gich_hcr(val);
28 }
29
gic_read_gich_vtr()30 uint32_t gic_read_gich_vtr() {
31 return gic_ops->read_gich_vtr();
32 }
33
gic_default_gich_vmcr()34 uint32_t gic_default_gich_vmcr() {
35 return gic_ops->default_gich_vmcr();
36 }
37
gic_read_gich_vmcr()38 uint32_t gic_read_gich_vmcr() {
39 return gic_ops->read_gich_vmcr();
40 }
41
gic_write_gich_vmcr(uint32_t val)42 void gic_write_gich_vmcr(uint32_t val) {
43 return gic_ops->write_gich_vmcr(val);
44 }
45
gic_read_gich_elrsr()46 uint64_t gic_read_gich_elrsr() {
47 return gic_ops->read_gich_elrsr();
48 }
49
gic_write_gich_apr(uint32_t idx,uint32_t val)50 void gic_write_gich_apr(uint32_t idx, uint32_t val) {
51 return gic_ops->write_gich_apr(idx, val);
52 }
53
gic_read_gich_apr(uint32_t idx)54 uint32_t gic_read_gich_apr(uint32_t idx) {
55 return gic_ops->read_gich_apr(idx);
56 }
57
gic_read_gich_misr()58 uint32_t gic_read_gich_misr() {
59 return gic_ops->read_gich_misr();
60 }
61
gic_read_gich_lr(uint32_t idx)62 uint64_t gic_read_gich_lr(uint32_t idx) {
63 return gic_ops->read_gich_lr(idx);
64 }
65
gic_write_gich_lr(uint32_t idx,uint64_t val)66 void gic_write_gich_lr(uint32_t idx, uint64_t val) {
67 return gic_ops->write_gich_lr(idx, val);
68 }
69
gic_get_gicv(paddr_t * gicv_paddr)70 zx_status_t gic_get_gicv(paddr_t* gicv_paddr) {
71 return gic_ops->get_gicv(gicv_paddr);
72 }
73
gic_get_lr_from_vector(bool hw,uint8_t prio,uint32_t vector)74 uint64_t gic_get_lr_from_vector(bool hw, uint8_t prio, uint32_t vector) {
75 return gic_ops->get_lr_from_vector(hw, prio, vector);
76 }
77
gic_get_vector_from_lr(uint64_t lr)78 uint32_t gic_get_vector_from_lr(uint64_t lr) {
79 return gic_ops->get_vector_from_lr(lr);
80 }
81
gic_get_num_pres()82 uint32_t gic_get_num_pres() {
83 return gic_ops->get_num_pres();
84 }
85
gic_get_num_lrs()86 uint32_t gic_get_num_lrs() {
87 return gic_ops->get_num_lrs();
88 }
89