1 // Copyright 2018 The Fuchsia Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include <ddk/debug.h>
6 #include <ddk/device.h>
7 #include <ddk/platform-defs.h>
8 #include <ddk/protocol/platform/bus.h>
9
10 #include <soc/mt8167/mt8167-clk.h>
11 #include <soc/mt8167/mt8167-hw.h>
12
13 #include "mt8167.h"
14
15 namespace board_mt8167 {
16
GpuInit()17 zx_status_t Mt8167::GpuInit() {
18
19 const pbus_mmio_t gpu_mmios[] = {
20 {
21 // Actual GPU registers
22 .base = MT8167_MFG_BASE,
23 .length = MT8167_MFG_SIZE,
24 },
25 {
26 .base = MT8167_MFG_TOP_CONFIG_BASE,
27 .length = MT8167_MFG_TOP_CONFIG_SIZE,
28 },
29 {
30 // Power registers
31 .base = MT8167_SCPSYS_BASE,
32 .length = MT8167_SCPSYS_SIZE,
33 },
34 {
35 // Clock registers
36 .base = MT8167_XO_BASE,
37 .length = MT8167_XO_SIZE,
38 },
39 };
40
41 const pbus_irq_t gpu_irqs[] = {
42 {
43 .irq = MT8167_IRQ_RGX,
44 .mode = ZX_INTERRUPT_MODE_LEVEL_LOW,
45 }};
46
47 const pbus_clk_t gpu_clks[] = {
48 {
49 .clk = kClkSlowMfg,
50 },
51 {
52 .clk = kClkAxiMfg,
53 },
54 {
55 .clk = kClkMfgMm,
56 }};
57 pbus_dev_t gpu_dev = {};
58 gpu_dev.name = "gpio";
59 gpu_dev.vid = PDEV_VID_MEDIATEK;
60 gpu_dev.did = PDEV_DID_MEDIATEK_GPU;
61 gpu_dev.mmio_list = gpu_mmios;
62 gpu_dev.mmio_count = countof(gpu_mmios);
63 gpu_dev.irq_list = gpu_irqs;
64 gpu_dev.irq_count = countof(gpu_irqs);
65 gpu_dev.clk_list = gpu_clks;
66 gpu_dev.clk_count = countof(gpu_clks);
67
68 zx_status_t status = pbus_.DeviceAdd(&gpu_dev);
69 if (status != ZX_OK) {
70 zxlogf(ERROR, "%s: ProtocolDeviceAdd failed %d\n", __FUNCTION__, status);
71 return status;
72 }
73
74 return ZX_OK;
75 }
76
77 } // namespace board_mt8167
78