1 // Copyright 2018 The Fuchsia Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #pragma once
6 #include <hwreg/mmio.h>
7 
8 #define DISPLAY_MASK(start, count) (((1 << (count)) - 1) << (start))
9 #define DISPLAY_SET_MASK(mask, start, count, value) \
10                         ((mask & ~DISPLAY_MASK(start, count)) | \
11                                 (((value) << (start)) & DISPLAY_MASK(start, count)))
12 
13 #define SET_BIT32(x, dest, value, start, count) \
14             WRITE32_##x##_REG(dest, (READ32_##x##_REG(dest) & ~DISPLAY_MASK(start, count)) | \
15                                 (((value) << (start)) & DISPLAY_MASK(start, count)))
16 
17 #define GET_BIT32(x, dest, start, count) \
18             ((READ32_##x##_REG(dest) >> (start)) & ((1 << (count)) - 1))
19 
20 #define SET_MASK32(x, dest, mask) \
21             WRITE32_##x##_REG(dest, (READ32_##x##_REG(dest) | mask))
22 
23 #define CLEAR_MASK32(x, dest, mask) \
24             WRITE32_##x##_REG(dest, (READ32_##x##_REG(dest) & ~(mask)))
25 
26 #define WRITE32_REG(x, a, v)            WRITE32_##x##_REG(a, v)
27 #define READ32_REG(x, a)                READ32_##x##_REG(a)
28 
29 #define DISP_ERROR(fmt, ...)    zxlogf(ERROR, "[%s %d]" fmt, __func__, __LINE__, ##__VA_ARGS__)
30 #define DISP_INFO(fmt, ...)     zxlogf(INFO, "[%s %d]" fmt, __func__, __LINE__, ##__VA_ARGS__)
31 #define DISP_SPEW(fmt, ...)     zxlogf(SPEW, "[%s %d]" fmt, __func__, __LINE__, ##__VA_ARGS__)
32 #define DISP_TRACE              zxlogf(INFO, "[%s %d]\n", __func__, __LINE__)
33 
34 // Should match display_mmios table in board driver
35 enum {
36     MMIO_VPU,
37     MMIO_MPI_DSI,
38     MMIO_DSI_PHY,
39     MMIO_HHI,
40     MMIO_AOBUS,
41     MMIO_CBUS,
42 };
43 
44 // Should match display_gpios table in board driver
45 enum {
46     GPIO_BL,
47     GPIO_LCD,
48     GPIO_PANEL_DETECT,
49     GPIO_HW_ID0,
50     GPIO_HW_ID1,
51     GPIO_HW_ID2,
52     GPIO_COUNT,
53 };
54 
55 // Should match display_irqs table in board driver
56 enum {
57     IRQ_VSYNC,
58     IRQ_RDMA,
59 };
60 
61 constexpr uint8_t PANEL_DISPLAY_ID = 1;
62 
63 // Astro Display dimension
64 constexpr uint32_t DISPLAY_WIDTH = 608;
65 constexpr uint32_t DISPLAY_HEIGHT = 1024;
66 
67 // Sherlock Display dimension
68 constexpr uint32_t SHERLOCK_DISPLAY_WIDTH = 800;
69 constexpr uint32_t SHERLOCK_DISPLAY_HEIGHT = 1280;
70 
71 constexpr bool kBootloaderDisplayEnabled = true;
72 
73 // Supported panel types
74 constexpr uint8_t  PANEL_TV070WSM_FT = 0x00;
75 constexpr uint8_t  PANEL_P070ACB_FT = 0x01;
76 constexpr uint8_t  PANEL_UNKNOWN = 0xff;
77 
78 // This display driver supports EVT hardware and onwards. For pre-EVT boards,
79 // it will simply configure the framebuffer and canvas and assume U-Boot has
80 // already done all display initializations
81 constexpr uint8_t  BOARD_REV_P1 = 0;
82 constexpr uint8_t  BOARD_REV_P2 = 1;
83 constexpr uint8_t  BOARD_REV_EVT_1 = 2;
84 constexpr uint8_t  BOARD_REV_EVT_2 = 3;
85 constexpr uint8_t  BOARD_REV_UNKNOWN = 0xff;
86 
87 // This structure is populated based on hardware/lcd type. Its values come from vendor.
88 // This table is the top level structure used to populated all Clocks/LCD/DSI/BackLight/etc
89 // values
90 struct DisplaySetting {
91     uint32_t lane_num;
92     uint32_t bit_rate_max;
93     uint32_t clock_factor;
94     uint32_t lcd_clock;
95     uint32_t h_active;
96     uint32_t v_active;
97     uint32_t h_period;
98     uint32_t v_period;
99     uint32_t hsync_width;
100     uint32_t hsync_bp;
101     uint32_t hsync_pol;
102     uint32_t vsync_width;
103     uint32_t vsync_bp;
104     uint32_t vsync_pol;
105 };
106